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From: Quentin Perret <qperret@google.com>
To: maz@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com,
	suzuki.poulose@arm.com, catalin.marinas@arm.com, will@kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
	ardb@kernel.org, qwandor@google.com, tabba@google.com,
	dbrazdil@google.com, kernel-team@android.com,
	Quentin Perret <qperret@google.com>
Subject: [PATCH v2 09/16] KVM: arm64: Allow populating software bits
Date: Mon, 26 Jul 2021 10:28:58 +0100	[thread overview]
Message-ID: <20210726092905.2198501-10-qperret@google.com> (raw)
In-Reply-To: <20210726092905.2198501-1-qperret@google.com>

Introduce infrastructure allowing to manipulate software bits in stage-1
and stage-2 page-tables using additional entries in the kvm_pgtable_prot
enum.

This is heavily inspired by Marc's implementation of a similar feature
in the NV patch series, but adapted to allow stage-1 changes as well:

  https://lore.kernel.org/kvmarm/20210510165920.1913477-56-maz@kernel.org/

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Quentin Perret <qperret@google.com>
---
 arch/arm64/include/asm/kvm_pgtable.h | 12 +++++++++++-
 arch/arm64/kvm/hyp/pgtable.c         |  5 +++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h
index 9246a27e2839..0be9f83974ad 100644
--- a/arch/arm64/include/asm/kvm_pgtable.h
+++ b/arch/arm64/include/asm/kvm_pgtable.h
@@ -108,6 +108,10 @@ enum kvm_pgtable_stage2_flags {
  * @KVM_PGTABLE_PROT_W:		Write permission.
  * @KVM_PGTABLE_PROT_R:		Read permission.
  * @KVM_PGTABLE_PROT_DEVICE:	Device attributes.
+ * @KVM_PGTABLE_PROT_SW0:	Software bit 0.
+ * @KVM_PGTABLE_PROT_SW1:	Software bit 1.
+ * @KVM_PGTABLE_PROT_SW2:	Software bit 2.
+ * @KVM_PGTABLE_PROT_SW3:	Software bit 3.
  */
 enum kvm_pgtable_prot {
 	KVM_PGTABLE_PROT_X			= BIT(0),
@@ -115,6 +119,11 @@ enum kvm_pgtable_prot {
 	KVM_PGTABLE_PROT_R			= BIT(2),
 
 	KVM_PGTABLE_PROT_DEVICE			= BIT(3),
+
+	KVM_PGTABLE_PROT_SW0			= BIT(55),
+	KVM_PGTABLE_PROT_SW1			= BIT(56),
+	KVM_PGTABLE_PROT_SW2			= BIT(57),
+	KVM_PGTABLE_PROT_SW3			= BIT(58),
 };
 
 #define KVM_PGTABLE_PROT_RW	(KVM_PGTABLE_PROT_R | KVM_PGTABLE_PROT_W)
@@ -406,7 +415,8 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr);
  * If there is a valid, leaf page-table entry used to translate @addr, then
  * relax the permissions in that entry according to the read, write and
  * execute permissions specified by @prot. No permissions are removed, and
- * TLB invalidation is performed after updating the entry.
+ * TLB invalidation is performed after updating the entry. Software bits cannot
+ * be set or cleared using kvm_pgtable_stage2_relax_perms().
  *
  * Return: 0 on success, negative error code on failure.
  */
diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index e0cd748e4af6..bd409d524dea 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c
@@ -370,6 +370,7 @@ static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep)
 	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap);
 	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);
 	attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF;
+	attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW;
 	*ptep = attr;
 
 	return 0;
@@ -571,6 +572,7 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot p
 
 	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh);
 	attr |= KVM_PTE_LEAF_ATTR_LO_S2_AF;
+	attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW;
 	*ptep = attr;
 
 	return 0;
@@ -1038,6 +1040,9 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
 	u32 level;
 	kvm_pte_t set = 0, clr = 0;
 
+	if (prot & KVM_PTE_LEAF_ATTR_HI_SW)
+		return -EINVAL;
+
 	if (prot & KVM_PGTABLE_PROT_R)
 		set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;
 
-- 
2.32.0.432.gabb21c7263-goog


  parent reply	other threads:[~2021-07-26  9:29 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-26  9:28 [PATCH v2 00/16] Track shared pages at EL2 in protected mode Quentin Perret
2021-07-26  9:28 ` [PATCH v2 01/16] KVM: arm64: Introduce helper to retrieve a PTE and its level Quentin Perret
2021-07-26  9:28 ` [PATCH v2 02/16] KVM: arm64: Provide the host_stage2_try() helper macro Quentin Perret
2021-07-26  9:28 ` [PATCH v2 03/16] KVM: arm64: Expose page-table helpers Quentin Perret
2021-07-26  9:28 ` [PATCH v2 04/16] KVM: arm64: Optimize host memory aborts Quentin Perret
2021-07-26 10:35   ` Marc Zyngier
2021-07-26 13:13     ` Quentin Perret
2021-07-26 13:24       ` Marc Zyngier
2021-07-26  9:28 ` [PATCH v2 05/16] KVM: arm64: Rename KVM_PTE_LEAF_ATTR_S2_IGNORED Quentin Perret
2021-07-26  9:28 ` [PATCH v2 06/16] KVM: arm64: Don't overwrite software bits with owner id Quentin Perret
2021-07-26  9:28 ` [PATCH v2 07/16] KVM: arm64: Tolerate re-creating hyp mappings to set software bits Quentin Perret
2021-07-26  9:28 ` [PATCH v2 08/16] KVM: arm64: Enable forcing page-level stage-2 mappings Quentin Perret
2021-07-26  9:28 ` Quentin Perret [this message]
2021-07-26  9:28 ` [PATCH v2 10/16] KVM: arm64: Add helpers to tag shared pages in SW bits Quentin Perret
2021-07-26  9:29 ` [PATCH v2 11/16] KVM: arm64: Introduce and export host_stage2_idmap_locked() Quentin Perret
2021-07-26  9:29 ` [PATCH v2 12/16] KVM: arm64: Mark host bss and rodata section as shared Quentin Perret
2021-07-28 12:14   ` Quentin Perret
2021-07-26  9:29 ` [PATCH v2 13/16] KVM: arm64: Enable retrieving protections attributes of PTEs Quentin Perret
2021-07-26  9:29 ` [PATCH v2 14/16] KVM: arm64: Refactor protected nVHE stage-1 locking Quentin Perret
2021-07-26  9:29 ` [PATCH v2 15/16] KVM: arm64: Restrict EL2 stage-1 changes in protected mode Quentin Perret
2021-07-26 11:27   ` Marc Zyngier
2021-07-26 12:55     ` Quentin Perret
2021-07-26  9:29 ` [PATCH v2 16/16] KVM: arm64: Make __pkvm_create_mappings static Quentin Perret

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