From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Rob Herring <robh+dt@kernel.org>,
Jonathan Cameron <jic23@kernel.org>,
Lars-Peter Clausen <lars@metafoo.de>,
Magnus Damm <magnus.damm@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Alexandru Ardelean <aardelean@deviqon.com>,
linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v3 3/3] arm64: dts: renesas: r9a07g044: Add ADC node
Date: Mon, 26 Jul 2021 19:28:50 +0100 [thread overview]
Message-ID: <20210726182850.14328-4-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20210726182850.14328-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Add ADC node to R9A07G044 (RZ/G2L) SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 9a7489dc70d1..28aafa34d583 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -169,6 +169,48 @@
status = "disabled";
};
+ adc: adc@10059000 {
+ compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc";
+ reg = <0 0x10059000 0 0x400>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>,
+ <&cpg CPG_MOD R9A07G044_ADC_PCLK>;
+ clock-names = "adclk", "pclk";
+ resets = <&cpg R9A07G044_ADC_PRESETN>,
+ <&cpg R9A07G044_ADC_ADRST_N>;
+ reset-names = "presetn", "adrst-n";
+ power-domains = <&cpg>;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ channel@0 {
+ reg = <0>;
+ };
+ channel@1 {
+ reg = <1>;
+ };
+ channel@2 {
+ reg = <2>;
+ };
+ channel@3 {
+ reg = <3>;
+ };
+ channel@4 {
+ reg = <4>;
+ };
+ channel@5 {
+ reg = <5>;
+ };
+ channel@6 {
+ reg = <6>;
+ };
+ channel@7 {
+ reg = <7>;
+ };
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g044-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.17.1
prev parent reply other threads:[~2021-07-26 18:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-26 18:28 [PATCH v3 0/3] Renesas RZ/G2L ADC driver support Lad Prabhakar
2021-07-26 18:28 ` [PATCH v3 1/3] dt-bindings: iio: adc: Add binding documentation for Renesas RZ/G2L A/D converter Lad Prabhakar
2021-07-26 21:42 ` Rob Herring
2021-07-27 8:06 ` Lad, Prabhakar
2021-07-27 20:30 ` Rob Herring
2021-07-26 18:28 ` [PATCH v3 2/3] iio: adc: Add driver " Lad Prabhakar
2021-07-27 7:13 ` Philipp Zabel
2021-07-27 8:02 ` Lad, Prabhakar
2021-07-27 8:13 ` Philipp Zabel
2021-07-27 8:54 ` Lad, Prabhakar
2021-07-31 17:11 ` Jonathan Cameron
2021-07-31 18:31 ` Lad, Prabhakar
2021-08-01 16:59 ` Jonathan Cameron
2021-08-01 19:51 ` Lad, Prabhakar
2021-07-26 18:28 ` Lad Prabhakar [this message]
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