From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3B48C4338F for ; Wed, 11 Aug 2021 19:12:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BD84F6054F for ; Wed, 11 Aug 2021 19:12:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231570AbhHKTNO (ORCPT ); Wed, 11 Aug 2021 15:13:14 -0400 Received: from mx0b-001ae601.pphosted.com ([67.231.152.168]:56176 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229655AbhHKTNN (ORCPT ); Wed, 11 Aug 2021 15:13:13 -0400 Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 17B9hd01013981; Wed, 11 Aug 2021 14:12:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=ohS8GrhqeoqIaFuWNRmyPCnMKH0g5P/XLRaQpWUSjsk=; b=K3QU7Z3E0lIelMCKzkCbmcdpv/fh8j3p/pWkJjsIaLaAjNQwm77hrdiEA6OrNjFmBxk0 QtEq7ucyVcx3SGPa9gkY+Xt+KNHcfi2Ocpui7ESN2UlEDO90z8FEEXzj48Mi5kelkB+L v1QzvGJQtiYs9YwC3pT6o2HyxRe1zNHtXEDfmScMoEMToD4nsBYomrR8dcBI+Qu/RIf6 dhEKUdCI04OnwU/JPgmkbCde6kjmZZixcl+erc2EKEeWpFj0/YwXd39SS3PrnzpqnP2R HwkdsNOS/Wue8Ht+elMv9W7v7uYW6oMSSXBVNQW7fKF0Mn067cezlryZqvNzHGuUxH8y xg== Received: from ediex02.ad.cirrus.com ([87.246.76.36]) by mx0b-001ae601.pphosted.com with ESMTP id 3acc5ngpgw-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Wed, 11 Aug 2021 14:12:39 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Wed, 11 Aug 2021 19:57:31 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.12 via Frontend Transport; Wed, 11 Aug 2021 19:57:31 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.180]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id DF74845D; Wed, 11 Aug 2021 18:57:30 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai CC: , , , Stefan Binding Subject: [PATCH v4 19/27] ALSA: hda/cs8409: Support multiple sub_codecs for Suspend/Resume/Unsol events Date: Wed, 11 Aug 2021 19:56:46 +0100 Message-ID: <20210811185654.6837-20-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210811185654.6837-1-vitalyr@opensource.cirrus.com> References: <20210811185654.6837-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: YRJr3VV8jhENIEzG0e0HPdQBQhXh-wtI X-Proofpoint-GUID: YRJr3VV8jhENIEzG0e0HPdQBQhXh-wtI X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 bulkscore=0 phishscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108110132 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Binding Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes Changes in v4: - No changes sound/pci/hda/patch_cs8409.c | 41 ++++++++++++++++++++++++------------ 1 file changed, 28 insertions(+), 13 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 9d1a457c2696..5b3221ddc51b 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -388,16 +388,21 @@ static int cs8409_build_controls(struct hda_codec *codec) return 0; } -/* Enable/Disable Unsolicited Response for gpio(s) 3,4 */ +/* Enable/Disable Unsolicited Response */ static void cs8409_enable_ur(struct hda_codec *codec, int flag) { - /* GPIO4 INT# and GPIO3 WAKE# */ + struct cs8409_spec *spec = codec->spec; + unsigned int ur_gpios = 0; + int i; + + for (i = 0; i < spec->num_scodecs; i++) + ur_gpios |= spec->scodecs[i]->irq_mask; + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, - flag ? CS8409_CS42L42_INT : 0); + flag ? ur_gpios : 0); snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_UNSOLICITED_ENABLE, flag ? AC_UNSOL_ENABLED : 0); - } static void cs8409_fix_caps(struct hda_codec *codec, unsigned int nid) @@ -629,6 +634,8 @@ static int cs42l42_jack_unsol_event(struct sub_codec *cs42l42) static void cs42l42_resume(struct sub_codec *cs42l42) { + struct hda_codec *codec = cs42l42->codec; + unsigned int gpio_data; struct cs8409_i2c_param irq_regs[] = { { 0x1308, 0x00 }, { 0x1309, 0x00 }, @@ -636,6 +643,12 @@ static void cs42l42_resume(struct sub_codec *cs42l42) { 0x130F, 0x00 }, }; + /* Bring CS42L42 out of Reset */ + gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0); + gpio_data |= cs42l42->reset_gpio; + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, gpio_data); + usleep_range(10000, 15000); + cs42l42->suspended = 0; /* Initialize CS42L42 companion codec */ @@ -661,10 +674,18 @@ static void cs42l42_resume(struct sub_codec *cs42l42) #ifdef CONFIG_PM static void cs42l42_suspend(struct sub_codec *cs42l42) { + struct hda_codec *codec = cs42l42->codec; + unsigned int gpio_data; + /* Power down CS42L42 ASP/EQ/MIX/HP */ cs8409_i2c_write(cs42l42, 0x1101, 0xfe); cs42l42->suspended = 1; cs42l42->last_page = 0; + + /* Put CS42L42 into Reset */ + gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0); + gpio_data &= ~cs42l42->reset_gpio; + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, gpio_data); } #endif @@ -726,13 +747,12 @@ static void cs8409_cs42l42_jack_unsol_event(struct hda_codec *codec, unsigned in static int cs8409_cs42l42_suspend(struct hda_codec *codec) { struct cs8409_spec *spec = codec->spec; + int i; cs8409_enable_ur(codec, 0); - cs42l42_suspend(spec->scodecs[CS8409_CODEC0]); - - /* Assert CS42L42 RTS# line */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); + for (i = 0; i < spec->num_scodecs; i++) + cs42l42_suspend(spec->scodecs[i]); /* Cancel i2c clock disable timer, and disable clock if left enabled */ cancel_delayed_work_sync(&spec->i2c_clk_work); @@ -775,11 +795,6 @@ static void cs8409_cs42l42_hw_init(struct hda_codec *codec) if (codec->fixup_id == CS8409_WARLOCK || codec->fixup_id == CS8409_CYBORG) cs8409_vendor_coef_set(codec, 0x09, 0x0003); - /* Release RTS# line */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, CS8409_CS42L42_RESET); - /* wait ~10ms */ - usleep_range(10000, 15000); - cs42l42_resume(cs42l42); /* Enable Unsolicited Response */ -- 2.25.1