From: kernel test robot <lkp@intel.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>,
Vinod Koul <vkoul@kernel.org>
Cc: clang-built-linux@googlegroups.com, kbuild-all@lists.01.org,
linux-media@vger.kernel.org, linuxarm@huawei.com,
mauro.chehab@huawei.com,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Manivannan Sadhasivam <mani@kernel.org>,
Rob Herring <robh@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v13] phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
Date: Sat, 21 Aug 2021 07:04:01 +0800 [thread overview]
Message-ID: <202108210625.U8TaX1jP-lkp@intel.com> (raw)
In-Reply-To: <2272f7c5be332b089ad8dd1b4e7eca3c17a617f7.1629466922.git.mchehab+huawei@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 3674 bytes --]
Hi Mauro,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.14-rc6 next-20210820]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Mauro-Carvalho-Chehab/phy-HiSilicon-Add-driver-for-Kirin-970-PCIe-PHY/20210820-214510
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d992fe5318d8d7af9510b879439a3c7f283da442
config: x86_64-buildonly-randconfig-r002-20210821 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project d9c5613e856cf2addfbf892fc4c1ce9ef9feceaa)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/1cc067fe7e9ca4a45f061447087187d1852fb716
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Mauro-Carvalho-Chehab/phy-HiSilicon-Add-driver-for-Kirin-970-PCIe-PHY/20210820-214510
git checkout 1cc067fe7e9ca4a45f061447087187d1852fb716
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/phy/hisilicon/phy-hi3670-pcie.c:358:6: warning: variable 'val' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
if (enable) {
^~~~~~
drivers/phy/hisilicon/phy-hi3670-pcie.c:364:12: note: uninitialized use occurs here
while (!(val & FNPLL_HAS_LOCKED)) {
^~~
drivers/phy/hisilicon/phy-hi3670-pcie.c:358:2: note: remove the 'if' if its condition is always false
if (enable) {
^~~~~~~~~~~~~
drivers/phy/hisilicon/phy-hi3670-pcie.c:355:9: note: initialize the variable 'val' to silence this warning
u32 val;
^
= 0
1 warning generated.
vim +358 drivers/phy/hisilicon/phy-hi3670-pcie.c
351
352 static int hi3670_pcie_pll_ctrl(struct hi3670_pcie_phy *phy, bool enable)
353 {
354 struct device *dev = phy->dev;
355 u32 val;
356 int time = PLL_CTRL_WAIT_TIME;
357
> 358 if (enable) {
359 /* pd = 0 */
360 hi3670_apb_phy_updatel(phy, 0, PCIE_PHY_MMC1PLL_DISABLE,
361 SOC_PCIEPHY_MMC1PLL_CTRL16);
362
363 /* choose FNPLL */
364 while (!(val & FNPLL_HAS_LOCKED)) {
365 if (!time) {
366 dev_err(dev, "wait for pll_lock timeout\n");
367 return -EINVAL;
368 }
369 time--;
370 udelay(1);
371 val = hi3670_apb_phy_readl(phy, SOC_PCIEPHY_MMC1PLL_STAT0);
372 }
373
374 hi3670_apb_phy_updatel(phy, 0, PCIE_PHY_PCIEPL_BP,
375 SOC_PCIEPHY_MMC1PLL_CTRL20);
376
377 } else {
378 hi3670_apb_phy_updatel(phy,
379 PCIE_PHY_MMC1PLL_DISABLE,
380 PCIE_PHY_MMC1PLL_DISABLE,
381 SOC_PCIEPHY_MMC1PLL_CTRL16);
382
383 hi3670_apb_phy_updatel(phy, PCIE_PHY_PCIEPL_BP,
384 PCIE_PHY_PCIEPL_BP,
385 SOC_PCIEPHY_MMC1PLL_CTRL20);
386 }
387
388 return 0;
389 }
390
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 39690 bytes --]
next prev parent reply other threads:[~2021-08-20 23:04 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-12 8:02 [PATCH v11 00/11] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 01/11] phy: HiSilicon: Add driver for Kirin 970 PCIe PHY Mauro Carvalho Chehab
2021-08-17 10:42 ` Vinod Koul
2021-08-18 9:01 ` Mauro Carvalho Chehab
2021-08-18 10:08 ` Mauro Carvalho Chehab
2021-08-18 10:10 ` Vinod Koul
2021-08-18 10:30 ` Mauro Carvalho Chehab
2021-08-18 10:37 ` Vinod Koul
2021-08-20 13:43 ` [PATCH v13] " Mauro Carvalho Chehab
2021-08-20 23:04 ` kernel test robot [this message]
2021-08-18 11:04 ` [PATCH v12] " Mauro Carvalho Chehab
2021-08-18 13:47 ` kernel test robot
2021-09-15 13:11 ` Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 02/11] PCI: kirin: Reorganize the PHY logic inside the driver Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 03/11] PCI: kirin: Add support for a PHY layer Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 04/11] PCI: kirin: Use regmap for APB registers Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 05/11] PCI: kirin: Add support for bridge slot DT schema Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 06/11] PCI: kirin: Add Kirin 970 compatible Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 07/11] PCI: kirin: Add MODULE_* macros Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 08/11] PCI: kirin: Allow building it as a module Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 09/11] PCI: kirin: Add power_off support for Kirin 960 PHY Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 10/11] PCI: kirin: fix poweroff sequence Mauro Carvalho Chehab
2021-08-12 8:02 ` [PATCH v11 11/11] PCI: kirin: Allow removing the driver Mauro Carvalho Chehab
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=202108210625.U8TaX1jP-lkp@intel.com \
--to=lkp@intel.com \
--cc=clang-built-linux@googlegroups.com \
--cc=gregkh@linuxfoundation.org \
--cc=kbuild-all@lists.01.org \
--cc=kishon@ti.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mani@kernel.org \
--cc=mauro.chehab@huawei.com \
--cc=mchehab@kernel.org \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).