From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <bp@alien8.de>,
<mchehab@kernel.org>, <tony.luck@intel.com>,
<james.morse@arm.com>, <rric@kernel.org>,
<Smita.KoralahalliChannabasappa@amd.com>,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v4 04/24] EDAC/amd64: Define function to find interleaving mode
Date: Thu, 27 Jan 2022 20:40:55 +0000 [thread overview]
Message-ID: <20220127204115.384161-5-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20220127204115.384161-1-yazen.ghannam@amd.com>
Define a helper function to find the interleaving mode. Define a
DF2-specific function now. Future DF versions will have their own
functions.
Use an enumeration for the interleaving modes to give a human-readable
value. Save the interleaving mode in the context struct, since this will
be used in multiple functions.
Multiple interleaving modes support hashing, so save a boolean in the
context struct to check if hashing is enabled. This boolean will be
replaced with a function pointer in a later patch.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lore.kernel.org/r/20211028175728.121452-9-yazen.ghannam@amd.com
v3->v4:
* Remove leading whitespace in function pointer definition.
* Include pr_debug() on failure.
v2->v3:
* Was patch 9 in v2.
* Updated commit message.
v1->v2:
* Moved from arch/x86 to EDAC.
* Add new function to data_fabric_ops.
drivers/edac/amd64_edac.c | 37 ++++++++++++++++++++++++++++++++++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index d1af1ce716f9..4e83a9be4724 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1057,8 +1057,16 @@ static int df_indirect_read_broadcast(u16 node, u8 func, u16 reg, u32 *lo)
return __df_indirect_read(node, func, reg, DF_BROADCAST, lo);
}
+/* These are mapped 1:1 to the hardware values. Special cases are set at > 0x20. */
+enum intlv_modes {
+ NONE = 0x00,
+ NOHASH_2CH = 0x01,
+ DF2_HASH_2CH = 0x21,
+};
+
/* Use "reg_" prefix for raw register values. */
struct addr_ctx {
+ enum intlv_modes intlv_mode;
u64 ret_addr;
u32 tmp;
u32 reg_dram_offset;
@@ -1067,10 +1075,12 @@ struct addr_ctx {
u16 nid;
u8 inst_id;
u8 map_num;
+ bool hash_enabled;
};
struct data_fabric_ops {
u64 (*get_hi_addr_offset)(struct addr_ctx *ctx);
+ int (*get_intlv_mode)(struct addr_ctx *ctx);
};
static u64 get_hi_addr_offset_df2(struct addr_ctx *ctx)
@@ -1078,8 +1088,26 @@ static u64 get_hi_addr_offset_df2(struct addr_ctx *ctx)
return (ctx->reg_dram_offset & GENMASK_ULL(31, 20)) << 8;
}
+static int get_intlv_mode_df2(struct addr_ctx *ctx)
+{
+ ctx->intlv_mode = (ctx->reg_base_addr >> 4) & 0xF;
+
+ if (ctx->intlv_mode == 8) {
+ ctx->intlv_mode = DF2_HASH_2CH;
+ ctx->hash_enabled = true;
+ }
+
+ if (ctx->intlv_mode != NONE &&
+ ctx->intlv_mode != NOHASH_2CH &&
+ ctx->intlv_mode != DF2_HASH_2CH)
+ return -EINVAL;
+
+ return 0;
+}
+
struct data_fabric_ops df2_ops = {
.get_hi_addr_offset = get_hi_addr_offset_df2,
+ .get_intlv_mode = get_intlv_mode_df2,
};
struct data_fabric_ops *df_ops;
@@ -1146,7 +1174,6 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
u8 num_intlv_bits, hashed_bit;
u8 lgcy_mmio_hole_en;
u8 cs_mask, cs_id = 0;
- bool hash_enabled = false;
struct addr_ctx ctx;
@@ -1173,6 +1200,11 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
goto out_err;
}
+ if (df_ops->get_intlv_mode(&ctx)) {
+ pr_debug("Failed to get interleave mode");
+ goto out_err;
+ }
+
lgcy_mmio_hole_en = ctx.reg_base_addr & BIT(1);
intlv_num_chan = (ctx.reg_base_addr >> 4) & 0xF;
intlv_addr_sel = (ctx.reg_base_addr >> 8) & 0x7;
@@ -1200,7 +1232,6 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
case 7: intlv_num_chan = 4; break;
case 8: intlv_num_chan = 1;
- hash_enabled = true;
break;
default:
pr_err("%s: Invalid number of interleaved channels %d.\n",
@@ -1302,7 +1333,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
ctx.ret_addr += (BIT_ULL(32) - dram_hole_base);
}
- if (hash_enabled) {
+ if (ctx.hash_enabled) {
/* Save some parentheses and grab ls-bit at the end. */
hashed_bit = (ctx.ret_addr >> 12) ^
(ctx.ret_addr >> 18) ^
--
2.25.1
next prev parent reply other threads:[~2022-01-27 20:41 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 20:40 [PATCH v4 00/24] AMD MCA Address Translation Updates Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 01/24] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2022-02-11 19:10 ` Borislav Petkov
2022-03-09 21:42 ` Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 02/24] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2022-02-11 19:23 ` Borislav Petkov
2022-03-09 21:43 ` Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 03/24] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2022-01-27 20:40 ` Yazen Ghannam [this message]
2022-01-27 20:40 ` [PATCH v4 05/24] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 06/24] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 07/24] EDAC/amd64: Define function to dehash address Yazen Ghannam
2022-02-11 22:47 ` Borislav Petkov
2022-03-09 21:50 ` Yazen Ghannam
2022-03-10 16:01 ` Borislav Petkov
2022-01-27 20:40 ` [PATCH v4 08/24] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2022-02-14 10:06 ` Borislav Petkov
2022-03-09 22:03 ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 09/24] EDAC/amd64: Remove goto statements Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 10/24] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2022-02-14 12:10 ` Borislav Petkov
2022-03-09 22:12 ` Yazen Ghannam
2022-03-10 16:09 ` Borislav Petkov
2022-01-27 20:41 ` [PATCH v4 11/24] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 12/24] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2022-02-14 12:20 ` Borislav Petkov
2022-03-09 22:13 ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 13/24] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 14/24] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 15/24] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 16/24] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2022-02-14 12:50 ` Borislav Petkov
2022-03-09 22:25 ` Yazen Ghannam
2022-03-11 21:00 ` Borislav Petkov
2022-01-27 20:41 ` [PATCH v4 17/24] EDAC/amd64: Define function to calculate " Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 18/24] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2022-02-14 13:09 ` Borislav Petkov
2022-03-09 22:31 ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 19/24] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 20/24] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 21/24] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2022-02-14 13:42 ` Borislav Petkov
2022-03-09 22:32 ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 22/24] EDAC/amd64: Match hash function to " Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 23/24] EDAC/amd64: Define function to get interleave address select bit Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 24/24] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
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