From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99B6DC433F5 for ; Fri, 11 Feb 2022 03:53:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242371AbiBKDxo (ORCPT ); Thu, 10 Feb 2022 22:53:44 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:39944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241220AbiBKDxe (ORCPT ); Thu, 10 Feb 2022 22:53:34 -0500 Received: from mail-m17664.qiye.163.com (mail-m17664.qiye.163.com [59.111.176.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B73B81125; Thu, 10 Feb 2022 19:53:33 -0800 (PST) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17664.qiye.163.com (Hmail) with ESMTPA id 301231401E1; Fri, 11 Feb 2022 11:43:54 +0800 (CST) From: Jon Lin To: broonie@kernel.org Cc: heiko@sntech.de, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jon Lin Subject: [PATCH v10 6/6] spi: rockchip: Support SPI_CS_HIGH Date: Fri, 11 Feb 2022 11:43:44 +0800 Message-Id: <20220211034344.4130-8-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220211034344.4130-1-jon.lin@rock-chips.com> References: <20220211034344.4130-1-jon.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUhPN1dZLVlBSVdZDwkaFQgSH1lBWUNNTx1WGktCTE5DSU5OSk 8eVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWVVLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PVE6Pio4Pz5WMB44GA8hF1ZO OCtPC0JVSlVKTU9PTk5KS0hPTkxMVTMWGhIXVREUFVUXEhU7CRQYEFYYExILCFUYFBZFWVdZEgtZ QVlOQ1VJSVVMVUpKT1lXWQgBWUFIS09MNwY+ X-HM-Tid: 0a7ee6e155edda2fkuws301231401e1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1.Add standard spi-cs-high support 2.Refer to spi-controller.yaml for details Signed-off-by: Jon Lin --- Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None drivers/spi/spi-rockchip.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index fbd750b1d28e..540861ca2ba3 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -107,6 +107,8 @@ #define CR0_OPM_MASTER 0x0 #define CR0_OPM_SLAVE 0x1 +#define CR0_SOI_OFFSET 23 + #define CR0_MTM_OFFSET 0x21 /* Bit fields in SER, 2bit */ @@ -236,7 +238,7 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) { struct spi_controller *ctlr = spi->controller; struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); - bool cs_asserted = !enable; + bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; /* Return immediately for no-op */ if (cs_asserted == rs->cs_asserted[spi->chip_select]) @@ -507,6 +509,8 @@ static int rockchip_spi_config(struct rockchip_spi *rs, cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; if (spi->mode & SPI_LSB_FIRST) cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET; + if (spi->mode & SPI_CS_HIGH) + cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET; if (xfer->rx_buf && xfer->tx_buf) cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET; @@ -795,6 +799,14 @@ static int rockchip_spi_probe(struct platform_device *pdev) ctlr->can_dma = rockchip_spi_can_dma; } + switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) { + case ROCKCHIP_SPI_VER2_TYPE2: + ctlr->mode_bits |= SPI_CS_HIGH; + break; + default: + break; + } + ret = devm_spi_register_controller(&pdev->dev, ctlr); if (ret < 0) { dev_err(&pdev->dev, "Failed to register controller\n"); -- 2.17.1