From: "Clément Léger" <clement.leger@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "Vivien Didelot" <vivien.didelot@gmail.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"Vladimir Oltean" <olteanv@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Herve Codina" <herve.codina@bootlin.com>,
"Miquèl Raynal" <miquel.raynal@bootlin.com>,
"Milan Stevanovic" <milan.stevanovic@se.com>,
"Jimmy Lalande" <jimmy.lalande@se.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH net-next 09/12] ARM: dts: r9a06g032: describe MII converter
Date: Fri, 15 Apr 2022 16:38:53 +0200 [thread overview]
Message-ID: <20220415163853.683c0b6d@fixe.home> (raw)
In-Reply-To: <Yll+Tpnwo5410B9H@lunn.ch>
Le Fri, 15 Apr 2022 16:16:46 +0200,
Andrew Lunn <andrew@lunn.ch> a écrit :
> On Fri, Apr 15, 2022 at 10:24:53AM +0200, Clément Léger wrote:
> > Le Fri, 15 Apr 2022 01:22:01 +0200,
> > Andrew Lunn <andrew@lunn.ch> a écrit :
> >
> > > On Thu, Apr 14, 2022 at 02:22:47PM +0200, Clément Léger wrote:
> > > > Add the MII converter node which describes the MII converter that is
> > > > present on the RZ/N1 SoC.
> > >
> > > Do you have a board which actually uses this? I just noticed that
> > > renesas,miic-cfg-mode is missing, it is a required property, but maybe
> > > the board .dts file provides it?
> > >
> > > Andrew
> >
> > Hi Andrew, yes, I have a board that defines and use that.
>
> Great. Do you plan to mainline it? It is always nice to see a user.
Although we are working on a specific customer board, we will probably
try to mailine this support for the RZ/N1D-DB.
>
> > The
> > renesas,miic-cfg-mode actually configures the muxes that are present on
> > the SoC. They allows to mux the various ethernet components (Sercos
> > Controller, HSR Controller, Ethercat, GMAC1, RTOS-GMAC).
> > All these muxes are actually controller by a single register
> > CONVCTRL_MODE. You can actually see the muxes that are present in the
> > manual [1] at Section 8 and the CONVCTRL_MODE possible values are listed
> > on page 180.
> >
> > This seems to be something that is board dependent because the muxing
> > controls the MII converter outputs which depends on the board layout.
>
> Does it also mux the MDIO lines as well?
Nope, the MDIO lines are muxed using the pinctrl driver.
>
> We might want to consider the name 'mux'. Linux already has the
> concept of a mux, e.g. an MDIO mux, and i2c mux etc. These muxes have
> one master device, which with the aid of the mux you can connect to
> multiple busses. And at runtime you flip the mux as needed to access
> the devices on the multiple slave busses. For MDIO you typically see
> this when you have multiple Ethernet switch, each has its own slave
> MDIO bus, and you use the mux to connect the single SOC MDIO bus
> master to the various slave busses as needed to perform a bus
> transaction. I2C is similar, you can have multiple SFPs, either with
> there own IC2 bus, connected via a mux to a single I2C bus controller
> on the SoC.
>
> I've not looked at the data sheet yet, but it sounds like it operates
> in a different way, so we might want to avoid 'mux'.
Indeed, Let's not refer to it as mux in the code at all. If using your
proposal below, I guess we could avoid that.
>
> > I'm open to any modification for this setup which does not really fit
> > any abstraction that I may have seen.
> >
> > [1]
> > https://www.renesas.com/us/en/document/mah/rzn1d-group-rzn1s-group-rzn1l-group-users-manual-system-introduction-multiplexing-electrical-and
>
> O.K, looking at figure 8.1.
>
> What the user wants to express is something like:
>
> Connect MI_CONV5 to SECOS PORTA
> Connect MI_CONV4 to ETHCAT PORTB
> Connect MI_CONV3 to SWITCH PORTC
> Connect MI_CONV2 to SWITCH PORTD
>
> plus maybe
>
> Connect SWITCH PORTIN to RTOS
Yes, that is correct.
>
> So i guess i would express the DT bindings like this, 5 values, and
> let the driver then try to figure out the value you need to put in the
> register, or return -EINVAL. For DT bindings we try to avoid magic
> values which get written into registers. We prefer a higher level
> description, and then let the driver figure out how to actually
> implement that.
Ok, looks like a more flexible way to doing it. Let's go with something
like this:
renesas,miic-port-connection = <PORTIN_GMAC2>, <MAC2>, <SWITCH_PORTC>,
<SWITCH_PORTB>, <SWITCH_PORTA>;
--
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com
next prev parent reply other threads:[~2022-04-15 14:40 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-14 12:22 [PATCH net-next 00/12] add support for Renesas RZ/N1 ethernet subsystem devices Clément Léger
2022-04-14 12:22 ` [PATCH net-next 01/12] net: dsa: add support for Renesas RZ/N1 A5PSW switch tag code Clément Léger
2022-04-14 13:44 ` Vladimir Oltean
2022-04-14 12:22 ` [PATCH net-next 02/12] net: dsa: add Renesas RZ/N1 switch tag driver Clément Léger
2022-04-14 14:22 ` Vladimir Oltean
2022-04-14 14:35 ` Clément Léger
2022-04-14 15:11 ` Vladimir Oltean
2022-04-14 16:18 ` Clément Léger
2022-04-14 16:23 ` Russell King (Oracle)
2022-04-15 7:23 ` Clément Léger
2022-04-14 22:50 ` Andrew Lunn
2022-04-14 12:22 ` [PATCH net-next 03/12] dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter Clément Léger
2022-04-14 18:59 ` Rob Herring
2022-04-19 13:43 ` Rob Herring
2022-04-19 15:00 ` Clément Léger
2022-04-20 20:11 ` Rob Herring
2022-04-21 7:35 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 04/12] net: pcs: add Renesas MII converter driver Clément Léger
2022-04-14 12:49 ` Russell King (Oracle)
2022-04-14 15:14 ` Clément Léger
2022-04-20 13:25 ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 05/12] dt-bindings: net: dsa: add bindings for Renesas RZ/N1 Advanced 5 port switch Clément Léger
2022-04-14 18:59 ` Rob Herring
2022-04-27 12:20 ` Geert Uytterhoeven
2022-04-27 12:56 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 06/12] net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver Clément Léger
2022-04-14 13:02 ` Russell King (Oracle)
2022-04-15 8:40 ` Clément Léger
2022-04-15 8:52 ` Russell King (Oracle)
2022-04-14 14:47 ` Vladimir Oltean
2022-04-14 17:51 ` Andrew Lunn
2022-04-15 9:34 ` Clément Léger
2022-04-15 10:55 ` Vladimir Oltean
2022-04-15 11:02 ` Russell King (Oracle)
2022-04-15 11:14 ` Vladimir Oltean
2022-04-15 11:23 ` Russell King (Oracle)
2022-04-15 12:01 ` Vladimir Oltean
2022-04-15 11:05 ` Vladimir Oltean
2022-04-15 12:31 ` Clément Léger
2022-04-15 12:28 ` Clément Léger
2022-04-15 12:41 ` Vladimir Oltean
2022-04-14 17:55 ` Andrew Lunn
2022-04-15 12:33 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 07/12] net: dsa: rzn1-a5psw: add statistics support Clément Léger
2022-04-14 17:34 ` Vladimir Oltean
2022-04-15 12:42 ` Clément Léger
2022-04-14 23:16 ` Andrew Lunn
2022-04-15 12:04 ` Clément Léger
2022-04-15 13:37 ` Andrew Lunn
2022-04-15 13:44 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 08/12] net: dsa: rzn1-a5psw: add FDB support Clément Léger
2022-04-14 17:51 ` Vladimir Oltean
2022-04-20 8:16 ` Clément Léger
2022-04-20 19:52 ` Vladimir Oltean
2022-04-21 7:38 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 09/12] ARM: dts: r9a06g032: describe MII converter Clément Léger
2022-04-14 23:22 ` Andrew Lunn
2022-04-15 8:24 ` Clément Léger
2022-04-15 14:16 ` Andrew Lunn
2022-04-15 14:38 ` Clément Léger [this message]
2022-04-15 15:12 ` Andrew Lunn
2022-04-15 15:29 ` Clément Léger
2022-04-15 16:19 ` Andrew Lunn
2022-04-15 16:45 ` Clément Léger
2022-04-16 13:48 ` Andrew Lunn
2022-04-19 9:03 ` Clément Léger
2022-04-19 12:57 ` Andrew Lunn
2022-04-20 20:16 ` Rob Herring
2022-04-14 12:22 ` [PATCH net-next 10/12] ARM: dts: r9a06g032: describe GMAC2 Clément Léger
2022-04-21 9:31 ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 11/12] ARM: dts: r9a06g032: describe switch Clément Léger
2022-04-21 9:34 ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 12/12] MAINTAINERS: add Renesas RZ/N1 switch related driver entry Clément Léger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220415163853.683c0b6d@fixe.home \
--to=clement.leger@bootlin.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=f.fainelli@gmail.com \
--cc=geert+renesas@glider.be \
--cc=herve.codina@bootlin.com \
--cc=hkallweit1@gmail.com \
--cc=jimmy.lalande@se.com \
--cc=krzk+dt@kernel.org \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=magnus.damm@gmail.com \
--cc=milan.stevanovic@se.com \
--cc=miquel.raynal@bootlin.com \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=pabeni@redhat.com \
--cc=robh+dt@kernel.org \
--cc=thomas.petazzoni@bootlin.com \
--cc=vivien.didelot@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).