From: Perry Yuan <Perry.Yuan@amd.com>
To: <rafael.j.wysocki@intel.com>, <ray.huang@amd.com>,
<viresh.kumar@linaro.org>
Cc: <Deepak.Sharma@amd.com>, <Mario.Limonciello@amd.com>,
<Nathan.Fontenot@amd.com>, <Alexander.Deucher@amd.com>,
<Shimmer.Huang@amd.com>, <Xiaojian.Du@amd.com>, <Li.Meng@amd.com>,
<linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Perry Yuan <Perry.Yuan@amd.com>
Subject: [PATCH v2 4/9] x86/msr: Add the MSR definition for AMD CPPC boost state
Date: Sun, 9 Oct 2022 15:10:28 +0800 [thread overview]
Message-ID: <20221009071033.21170-5-Perry.Yuan@amd.com> (raw)
In-Reply-To: <20221009071033.21170-1-Perry.Yuan@amd.com>
This MSR can be used to check whether the CPU frequency boost state
is enabled in the hardware control. User can change the boost state in
the BIOS setting,amd_pstate driver will update the boost state according
to this msr value.
AMD Processor Programming Reference (PPR)
Link: https://www.amd.com/system/files/TechDocs/40332.pdf [p1095]
Link: https://www.amd.com/system/files/TechDocs/56569-A1-PUB.zip [p162]
Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
arch/x86/include/asm/msr-index.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 6674bdb096f3..e5ea1c9f747b 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -569,6 +569,7 @@
#define MSR_AMD_CPPC_CAP2 0xc00102b2
#define MSR_AMD_CPPC_REQ 0xc00102b3
#define MSR_AMD_CPPC_STATUS 0xc00102b4
+#define MSR_AMD_CPPC_HW_CTL 0xc0010015
#define AMD_CPPC_LOWEST_PERF(x) (((x) >> 0) & 0xff)
#define AMD_CPPC_LOWNONLIN_PERF(x) (((x) >> 8) & 0xff)
@@ -579,6 +580,8 @@
#define AMD_CPPC_MIN_PERF(x) (((x) & 0xff) << 8)
#define AMD_CPPC_DES_PERF(x) (((x) & 0xff) << 16)
#define AMD_CPPC_ENERGY_PERF_PREF(x) (((x) & 0xff) << 24)
+#define AMD_CPPC_PRECISION_BOOST_BIT 25
+#define AMD_CPPC_PRECISION_BOOST_ENABLED BIT_ULL(AMD_CPPC_PRECISION_BOOST_BIT)
/* AMD Performance Counter Global Status and Control MSRs */
#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS 0xc0000300
--
2.34.1
next prev parent reply other threads:[~2022-10-09 7:11 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-09 7:10 [PATCH v2 0/9] Implement AMD Pstate EPP Driver Perry Yuan
2022-10-09 7:10 ` [PATCH v2 1/9] ACPI: CPPC: Add AMD pstate energy performance preference cppc control Perry Yuan
2022-10-09 7:10 ` [PATCH v2 2/9] cpufreq: amd_pstate: add module parameter to load amd pstate EPP driver Perry Yuan
2022-10-09 7:10 ` [PATCH v2 3/9] cpufreq: cpufreq: export cpufreq cpu release and acquire Perry Yuan
2022-10-09 7:10 ` Perry Yuan [this message]
2022-10-09 7:10 ` [PATCH v2 5/9] Documentation: amd-pstate: add EPP profiles introduction Perry Yuan
2022-10-09 7:10 ` [PATCH v2 6/9] cpufreq: amd_pstate: add AMD pstate EPP support for shared memory type processor Perry Yuan
2022-10-09 7:10 ` [PATCH v2 7/9] cpufreq: amd_pstate: add AMD Pstate EPP support for the MSR based processors Perry Yuan
2022-10-09 11:26 ` kernel test robot
2022-10-09 11:26 ` kernel test robot
2022-10-09 7:10 ` [PATCH v2 8/9] cpufreq: amd_pstate: implement amd pstate cpu online and offline callback Perry Yuan
2022-10-09 7:10 ` [PATCH v2 9/9] cpufreq: amd-pstate: implement suspend and resume callbacks Perry Yuan
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