From: Adrian Hunter <adrian.hunter@intel.com>
To: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>,
"Michal Simek" <michal.simek@xilinx.com>,
"Kevin Liu" <kliu5@marvell.com>,
"Suneel Garapati" <suneel.garapati@xilinx.com>,
"Ulf Hansson" <ulf.hansson@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
Al Cooper <alcooperx@gmail.com>
Subject: Re: [PATCH v4 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit
Date: Wed, 4 Aug 2021 15:33:56 +0300 [thread overview]
Message-ID: <2cdb95f3-8943-715a-d3d7-804953e49786@intel.com> (raw)
In-Reply-To: <ff3907df3aa91f83a4a0a22b63d51bfe491ed039.1627204633.git.mirq-linux@rere.qmqm.pl>
On 25/07/21 12:20 pm, Michał Mirosław wrote:
> Push handling of clock frequency dependence for
> SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN quirk to the drivers that use it.
What is the max_clk dependency for, and why push it down?
>
> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> ---
> v4: fix build issue reported by kernel test robot
> v3: rebased on v5.14-rc2 and reworded commitmsg
> v2: reworded commitmsg
> ---
> drivers/mmc/host/sdhci-of-arasan.c | 11 ++++-------
> drivers/mmc/host/sdhci-of-dwcmshc.c | 8 +++++---
> drivers/mmc/host/sdhci.c | 3 +--
> 3 files changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index 737e2bfdedc2..f2a6441ab540 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -452,8 +452,7 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = {
> static const struct sdhci_pltfm_data sdhci_arasan_cqe_pdata = {
> .ops = &sdhci_arasan_cqe_ops,
> .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
> };
>
> #ifdef CONFIG_PM_SLEEP
> @@ -1118,7 +1117,6 @@ static const struct sdhci_pltfm_data sdhci_arasan_pdata = {
> .ops = &sdhci_arasan_ops,
> .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> SDHCI_QUIRK2_STOP_WITH_TC,
> };
>
> @@ -1141,7 +1139,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_emmc_pdata = {
> SDHCI_QUIRK_32BIT_DMA_SIZE |
> SDHCI_QUIRK_32BIT_ADMA_SIZE,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
> SDHCI_QUIRK2_STOP_WITH_TC |
> SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
> @@ -1156,7 +1153,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sd_pdata = {
> SDHCI_QUIRK_32BIT_DMA_SIZE |
> SDHCI_QUIRK_32BIT_ADMA_SIZE,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
> SDHCI_QUIRK2_STOP_WITH_TC |
> SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
> @@ -1171,7 +1167,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sdio_pdata = {
> SDHCI_QUIRK_32BIT_DMA_SIZE |
> SDHCI_QUIRK_32BIT_ADMA_SIZE,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> SDHCI_QUIRK2_HOST_OFF_CARD_ON |
> SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
> };
> @@ -1197,7 +1192,6 @@ static struct sdhci_arasan_of_data intel_lgm_sdxc_data = {
> static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = {
> .ops = &sdhci_arasan_ops,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> SDHCI_QUIRK2_STOP_WITH_TC,
> };
>
> @@ -1502,6 +1496,9 @@ static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan)
> bool dma64;
> int ret;
>
> + if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
> + host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
> +
> if (!sdhci_arasan->has_cqe)
> return sdhci_add_host(host);
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index bac874ab0b33..b6b7c4068e90 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -283,14 +283,13 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
> .ops = &sdhci_dwcmshc_rk3568_ops,
> .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
> SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
> - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
> };
>
> static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
> {
> - int err;
> struct rk3568_priv *priv = dwc_priv->priv;
> + int err;
>
> priv->rockchip_clks[0].id = "axi";
> priv->rockchip_clks[1].id = "block";
> @@ -318,6 +317,9 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
> sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
> sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
>
> + if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
> + host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
> +
> return 0;
> }
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 0993f7d0ce8e..cfa314e659bc 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1905,8 +1905,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
> /* Version 3.00 divisors must be a multiple of 2. */
> if (host->max_clk <= clock) {
> div = 1;
> - if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
> - && host->max_clk <= 25000000)
> + if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
> div = 2;
> } else {
> for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
>
next prev parent reply other threads:[~2021-08-04 12:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-25 9:20 [PATCH v4 0/5] SDHCI clock handling fixes and cleanups Michał Mirosław
2021-07-25 9:20 ` [PATCH v4 1/5] mmc: sdhci: fix base clock usage in preset value Michał Mirosław
2021-08-04 10:50 ` Adrian Hunter
2021-07-25 9:20 ` [PATCH v4 2/5] mmc: sdhci: always obey programmable clock config " Michał Mirosław
2021-08-04 10:52 ` Adrian Hunter
2021-08-07 14:05 ` Michał Mirosław
2021-08-12 9:54 ` Adrian Hunter
2021-07-25 9:20 ` [PATCH v4 3/5] mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN Michał Mirosław
2021-08-04 11:06 ` Adrian Hunter
2021-08-07 14:08 ` Michał Mirosław
2021-07-25 9:20 ` [PATCH v4 5/5] mmc: sdhci: simplify v2/v3+ clock calculation Michał Mirosław
2021-08-04 12:40 ` Adrian Hunter
2021-08-07 15:39 ` Michał Mirosław
2021-07-25 9:20 ` [PATCH v4 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit Michał Mirosław
2021-08-04 12:33 ` Adrian Hunter [this message]
2021-08-07 14:12 ` Michał Mirosław
2021-08-12 10:01 ` Adrian Hunter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2cdb95f3-8943-715a-d3d7-804953e49786@intel.com \
--to=adrian.hunter@intel.com \
--cc=alcooperx@gmail.com \
--cc=kliu5@marvell.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=michal.simek@xilinx.com \
--cc=mirq-linux@rere.qmqm.pl \
--cc=suneel.garapati@xilinx.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).