From: Simon Hatliff <hatliff@cadence.com>
To: Boris Brezillon <boris.brezillon@free-electrons.com>,
Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Subject: Re: [PATCH 1/2] gpio: Add a driver for Cadence GPIO controller
Date: Thu, 30 Mar 2017 18:26:01 +0100 [thread overview]
Message-ID: <3422ee23-53b5-8d09-2a5e-d700358ab09d@cadence.com> (raw)
In-Reply-To: <20170330132946.41314874@bbrezillon>
Hi Boris, Linus,
On 30/03/17 12:29, Boris Brezillon wrote:
> Hi Linus,
>
> On Thu, 30 Mar 2017 11:03:45 +0200
> Linus Walleij <linus.walleij@linaro.org> wrote:
>
>> On Wed, Mar 29, 2017 at 6:04 PM, Boris Brezillon
>> <boris.brezillon@free-electrons.com> wrote:
>>
>>> Add a driver for Cadence GPIO controller.
>> IIUC Cadence do a lot of things. Are there variants of this controller?
> I'll let Simon answer that one.
This is a controller that has been around since 2000. It is not
configurable in any way, so there are no variants. Cadence do not offer
any other GPIO controllers as IP.
>>> +static irqreturn_t cdns_gpio_irq_handler(int irq, void *dev)
>>> +{
>>> + struct cdns_gpio_chip *cgpio = dev;
>>> + unsigned long status;
>>> + int hwirq;
>>> +
>>> + /*
>>> + * FIXME: If we have an edge irq that is masked we might lose it
>>> + * since reading the STATUS register clears all IRQ flags.
>>> + * We could store the status of all masked IRQ in the cdns_gpio_chip
>>> + * struct but we then have no way to re-trigger the interrupt when
>>> + * it is unmasked.
>>> + */
>> It is marked FIXME but do you think it can even be fixed? It seems
>> like a hardware flaw. :(
> Maybe not. Unless Simon comes up with a magic register to re-trigger an
> interrupt :-).
There are no plans to update the controller.
> Another solution would be to write 0xffffffff into CDNS_GPIO_OUTPUT_EN
> at probe time so that each time CDNS_GPIO_DIRECTION_MODE is modified to
> set a pin in output mode, the CDNS_GPIO_OUTPUT_EN is already correctly
> configured.
> Simon, would that work? Is there a good reason to keep a bit in
> CDNS_GPIO_OUTPUT_EN set to 0 when the GPIO is in input mode (power
> consumption?)?
If direction_mode is set to input then output_en is ignored so this
should work. The hardware defaults to output mode, so as long as you
set all pins to input mode before you set all output_en bits there
should be no negative effect.
Cheers,
-- Simon
next prev parent reply other threads:[~2017-03-30 18:12 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 16:04 [PATCH 1/2] gpio: Add a driver for Cadence GPIO controller Boris Brezillon
2017-03-29 16:04 ` [PATCH 2/2] dt-bindings: gpio: Document Cadence GPIO controller bindings Boris Brezillon
2017-03-30 8:37 ` Linus Walleij
2017-03-30 9:03 ` [PATCH 1/2] gpio: Add a driver for Cadence GPIO controller Linus Walleij
2017-03-30 11:29 ` Boris Brezillon
2017-03-30 11:51 ` Linus Walleij
2017-03-30 17:26 ` Simon Hatliff [this message]
2017-03-31 13:28 ` Boris Brezillon
2017-04-10 13:26 ` Boris Brezillon
2017-04-24 13:00 ` Linus Walleij
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