From: Jonathan Marek <jonathan@marek.ca>
To: Christoph Hellwig <hch@infradead.org>
Cc: freedreno@lists.freedesktop.org, Rob Clark <robdclark@gmail.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@vger.kernel.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel@lists.freedesktop.org>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/3] drm/msm: add DRM_MSM_GEM_SYNC_CACHE for non-coherent cache maintenance
Date: Mon, 5 Oct 2020 10:35:43 -0400 [thread overview]
Message-ID: <3e0b91be-e4a4-4ea5-7d58-6e71b8d51932@marek.ca> (raw)
In-Reply-To: <20201005082914.GA31702@infradead.org>
On 10/5/20 4:29 AM, Christoph Hellwig wrote:
> On Fri, Oct 02, 2020 at 08:46:35AM -0400, Jonathan Marek wrote:
>>>> +void msm_gem_sync_cache(struct drm_gem_object *obj, uint32_t flags,
>>>> + size_t range_start, size_t range_end)
>>>> +{
>>>> + struct msm_gem_object *msm_obj = to_msm_bo(obj);
>>>> +
>>>> + /* TODO: sync only the required range, and don't invalidate on clean */
>>>> +
>>>> + if (flags & MSM_GEM_SYNC_CACHE_CLEAN)
>>>> + sync_for_device(msm_obj);
>>>> +
>>>> + if (flags & MSM_GEM_SYNC_CACHE_INVALIDATE)
>>>> + sync_for_cpu(msm_obj);
>>>
>>> And make to these ones as well. They are complete abuses of the DMA
>>> API, and while we had to live with that for now to not cause regressions
>>> they absoutely must not be exposed in a userspace ABI like this.
>>>
>>
>> How do you propose that cached non-coherent memory be implemented? It is a
>> useful feature for userspace.
>
> If the driver is using the DMA API you need to use dma_alloc_noncoherent
> and friends as of 5.10 (see the iommu list for the discussion).
>
> If you use the raw IOMMU API (which I think the msm drm driver does) you
> need to work with the maintainers to implement a cache synchronization
> API that is not tied to the DMA API.
>
The cache synchronization doesn't have anything to do with IOMMU (for
example: cache synchronization would be useful in cases where drm/msm
doesn't use IOMMU).
What is needed is to call arch_sync_dma_for_{cpu,device} (which is what
I went with initially, but then decided to re-use drm/msm's
sync_for_{cpu,device}). But you are also saying those functions aren't
for driver use, and I doubt IOMMU maintainers will want to add wrappers
for these functions just to satisfy this "not for driver use" requirement.
next prev parent reply other threads:[~2020-10-05 14:37 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-01 0:27 [PATCH 0/3] drm/msm: support for host-cached BOs Jonathan Marek
2020-10-01 0:27 ` [PATCH 1/3] drm/msm: add MSM_BO_CACHED_COHERENT Jonathan Marek
2020-10-01 23:47 ` Jordan Crouse
2020-10-01 0:27 ` [PATCH 2/3] drm/msm: add DRM_MSM_GEM_SYNC_CACHE for non-coherent cache maintenance Jonathan Marek
2020-10-01 23:29 ` [Freedreno] " Jordan Crouse
2020-10-02 7:53 ` Christoph Hellwig
2020-10-02 12:46 ` Jonathan Marek
2020-10-05 8:29 ` Christoph Hellwig
2020-10-05 14:35 ` Jonathan Marek [this message]
2020-10-06 7:23 ` Christoph Hellwig
2020-10-06 13:19 ` Jonathan Marek
2020-10-07 6:25 ` Christoph Hellwig
2020-10-13 13:42 ` Robin Murphy
2020-10-13 16:11 ` Rob Clark
2020-10-15 6:55 ` Christoph Hellwig
2020-10-15 15:33 ` Daniel Vetter
2020-10-15 15:43 ` Christoph Hellwig
2020-10-23 6:48 ` Christoph Hellwig
2020-10-08 8:27 ` Joerg Roedel
2020-10-01 0:27 ` [PATCH 3/3] drm/msm: bump up the uapi version Jonathan Marek
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