Re: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64 with MCP51 laptops

From: "David P. Reed" <dpreed@reed.com>
To: "linux-os (Dick Johnson)" <linux-os@analogic.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>,
	Rene Herman <rene.herman@keyaccess.nl>,
	Paul Rolland <rol@as2917.net>,
	David Newall <david@davidnewall.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Krzysztof Halasa <khc@pm.waw.pl>, Pavel Machek <pavel@ucw.cz>,
	Andi Kleen <andi@firstfloor.org>,
	linux-kernel@vger.kernel.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	rol@witbe.net
Subject: Re: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64 with MCP51 laptops
Date: Tue, 11 Dec 2007 18:56:45 -0500	[thread overview]
Message-ID: <475F23BD.3040903@reed.com> (raw)
In-Reply-To: <Pine.LNX.4.61.0712111513490.23653@chaos.analogic.com>

1) I found in a book, the Undocumented PC, that I have lying around that 
the "pause" recommended for some old adapter chips on the ISA bus was 1 
usec.  The book carefully points out on various models of PCs how many 
short jumps are required to implement 1 usec, and suggests that for 
faster machines, 1 usec loops be calibrated.  That seems like a good 
heuristic.

2) Also, Dick, you got me interested in doing more historical research 
into electrical specs and circuit diagrams (which did come with the IBM 
5150).  The bus in the original IBM PC had no problem with "bus capacity 
being charged" as you put it.   Perhaps you don't remember that the I/O 
bus had the same electrical characteristics as the memory bus.  Thus 
there is no issue with the bus being "charged".  The issue of delays 
between i/o instructions was entirely a problem of whether the adapter 
card could clock data into its buffers and handle the clocked in data in 
time for another bus cycle.  This had nothing to do with "charging" - 
buses in those days happily handled edges that were much faster than 1 usec.

We at Software Arts did what we did based on direct measurements and 
testing.  We found that the early BIOS listings were usually fine, but 
in fact were misleading. After all, the guys who built the machine and 
wrote the BIOS were in a hurry.  There were errata. 

linux-os (Dick Johnson) wrote:
> You do remember that the X86 can do back-to-back port
> instructions faster than the ISA bus capacity can be
> charged, don't you? You do remember the admonishment
> about:
>  	intel asm
>
>  	mov	dx, port	; One of two adjacent ports
>  	mov	al,ffh		; All bits set
>  	out	dx,al		; Output to port, bits start charging bus
>  	inc	al		; Al becomes 0
>  	inc	dx		; Next port
>  	out	dx,al		; Write 0 there, data bits discharged
>
> When the port at 'port' gets its data, it will likely
> be 0, not 0xff, because the intervening instructions
> can execute faster than a heavily-loaded ISA bus.
>
>   