From: okukatla@codeaurora.org
To: Sibi Sankar <sibis@codeaurora.org>
Cc: georgi.djakov@linaro.org, bjorn.andersson@linaro.org,
evgreen@google.com, Andy Gross <agross@kernel.org>,
Georgi Djakov <djakov@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
sboyd@kernel.org, ilina@codeaurora.org, seansw@qti.qualcomm.com,
elder@linaro.org, linux-arm-msm-owner@vger.kernel.org,
sibis=codeaurora.org@codeaurora.org
Subject: Re: [1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
Date: Tue, 18 May 2021 22:23:19 +0530 [thread overview]
Message-ID: <51ccc3e65a25fe6e278621459a75e191@codeaurora.org> (raw)
In-Reply-To: <825aca2d853e5dd577d61396df49f44a@codeaurora.org>
On 2021-04-30 11:04, Sibi Sankar wrote:
> Hey Odelu,
> Thanks for the patch!
>
> On 2021-04-16 12:28, Odelu Kukatla wrote:
>> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SC7280
>> SoCs.
>>
>> Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
>> ---
>> Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git
>> a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
>> b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
>> index d6a95c3..98223f8 100644
>> --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
>> +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
>> @@ -18,6 +18,7 @@ properties:
>> compatible:
>> enum:
>> - qcom,sc7180-osm-l3
>> + - qcom,sc7280-epss-l3
>> - qcom,sdm845-osm-l3
>> - qcom,sm8150-osm-l3
>> - qcom,sm8250-epss-l3
>
> Based on the driver/dts changes the
> reg property maxItems will no longer
> be just 1.
Thanks Sibi!
I will address this in next revision.
next prev parent reply other threads:[~2021-05-18 16:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 6:58 [0/3] Add L3 provider support for SC7280 Odelu Kukatla
2021-04-16 6:58 ` [1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280 Odelu Kukatla
2021-04-29 21:47 ` Rob Herring
2021-04-30 5:34 ` Sibi Sankar
2021-05-18 16:53 ` okukatla [this message]
2021-04-16 6:58 ` [2/3] interconnect: qcom: Add EPSS L3 support " Odelu Kukatla
2021-04-20 8:11 ` Georgi Djakov
2021-05-18 16:57 ` okukatla
2021-04-16 6:58 ` [3/3] arm64: dts: qcom: sc7280: Add EPSS L3 interconnect provider Odelu Kukatla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=51ccc3e65a25fe6e278621459a75e191@codeaurora.org \
--to=okukatla@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=djakov@kernel.org \
--cc=elder@linaro.org \
--cc=evgreen@google.com \
--cc=georgi.djakov@linaro.org \
--cc=ilina@codeaurora.org \
--cc=linux-arm-msm-owner@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=seansw@qti.qualcomm.com \
--cc=sibis=codeaurora.org@codeaurora.org \
--cc=sibis@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).