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From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: <joro@8bytes.org>, <pbonzini@redhat.com>,
	<alex.williamson@redhat.com>, <kvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <sherry.hurwitz@amd.com>
Subject: Re: [PART2 PATCH v4 10/11] svm: Introduce AMD IOMMU avic_ga_log_notifier
Date: Thu, 14 Jul 2016 16:43:47 +0700	[thread overview]
Message-ID: <57875ED3.9090307@amd.com> (raw)
In-Reply-To: <20160713142953.GA13201@potion>

Hi Radim,

On 7/13/16 21:29, Radim Krčmář wrote:
> 2016-07-13 08:20-0500, Suravee Suthikulpanit:
>> >From: Suravee Suthikulpanit<Suravee.Suthikulpanit@amd.com>
>> >
>> >This patch introduces avic_ga_log_notifier, which will be called
>> >by IOMMU driver whenever it handles the Guest vAPIC (GA) log entry.
>> >
>> >Signed-off-by: Suravee Suthikulpanit<suravee.suthikulpanit@amd.com>
>> >---
>> >  arch/x86/include/asm/kvm_host.h |  2 ++
>> >  arch/x86/kvm/svm.c              | 68 +++++++++++++++++++++++++++++++++++++++--
>> >  2 files changed, 68 insertions(+), 2 deletions(-)
>> >
>> >diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>> >index 69e62862..a9466ad 100644
>> >--- a/arch/x86/include/asm/kvm_host.h
>> >+++ b/arch/x86/include/asm/kvm_host.h
>> >@@ -776,9 +776,11 @@ struct kvm_arch {
>> >  	bool disabled_lapic_found;
>> >
>> >  	/* Struct members for AVIC */
>> >+	u32 avic_vm_id;
>> >  	u32 ldr_mode;
>> >  	struct page *avic_logical_id_table_page;
>> >  	struct page *avic_physical_id_table_page;
>> >+	struct hlist_node hnode;
>> >  };
>> >
>> >  struct kvm_vm_stat {
>> >diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
>> >index 16ef31b..1d9f2f6 100644
>> >--- a/arch/x86/kvm/svm.c
>> >+++ b/arch/x86/kvm/svm.c
>> >@@ -34,6 +34,8 @@
>> >  #include <linux/sched.h>
>> >  #include <linux/trace_events.h>
>> >  #include <linux/slab.h>
>> >+#include <linux/amd-iommu.h>
>> >+#include <linux/hashtable.h>
>> >
>> >  #include <asm/apic.h>
>> >  #include <asm/perf_event.h>
>> >@@ -928,6 +930,53 @@ static void svm_disable_lbrv(struct vcpu_svm *svm)
>> >  	set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);
>> >  }
>> >
>> >+/* Note:
>> >+ * This hash table is used to map VM_ID to a struct kvm_arch,
>> >+ * when handling AMD IOMMU GALOG notification to schedule in
>> >+ * a particular vCPU.
>> >+ */
>> >+#define SVM_VM_DATA_HASH_BITS	8
>> >+DECLARE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);
>> >+static spinlock_t svm_vm_data_hash_lock;
>> >+
>> >+/* Note:
>> >+ * This function is called from IOMMU driver to notify
>> >+ * SVM to schedule in a particular vCPU of a particular VM.
>> >+ */
>> >+static int avic_ga_log_notifier(int vm_id, int vcpu_id)
>> >+{
>> >+	unsigned long flags;
>> >+	struct kvm_arch *ka = NULL;
>> >+	struct kvm_vcpu *vcpu = NULL;
>> >+	struct vcpu_svm *svm = NULL;
>> >+
>> >+	pr_debug("SVM: %s: vm_id=%#x, vcpu_id=%#x\n", __func__, vm_id, vcpu_id);
>> >+
>> >+	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
>> >+	hash_for_each_possible(svm_vm_data_hash, ka, hnode, vm_id) {
>> >+		struct kvm *kvm = container_of(ka, struct kvm, arch);
>> >+
>> >+		vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);
> The first result is not neccessarily the correct one.
>
> With more than active 256 VMs, there is a guaranteed collision that
> cannot be disambiguated, so VCPUs in both VMs need to be woken up.
>
> Having a 24 bit vm_id and checking that
>    kvm->*.avic_id & 0xfffff == vm_id
> would help a bit to avoid useless wakeups, but the collision cannot be
> avoided.

True. What if SVM guarantee that the VM_ID won't conflict b/w any two 
active VMs?

Thanks
Suravee.

  reply	other threads:[~2016-07-14  9:44 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-13 13:20 [PART2 PATCH v4 00/11] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 01/11] iommu/amd: Detect and enable guest vAPIC support Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 02/11] iommu/amd: Move and introduce new IRTE-related unions and structures Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 03/11] iommu/amd: Introduce interrupt remapping ops structure Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 04/11] iommu/amd: Add support for multiple IRTE formats Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 05/11] iommu/amd: Detect and initialize guest vAPIC log Suravee Suthikulpanit
2016-07-20  7:15   ` [lkp] " Fengguang Wu
2016-07-13 13:20 ` [PART2 PATCH v4 06/11] iommu/amd: Adding GALOG interrupt handler Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 07/11] iommu/amd: Introduce amd_iommu_update_ga() Suravee Suthikulpanit
2016-07-13 14:14   ` Radim Krčmář
2016-07-14  9:13     ` Suravee Suthikulpanit
2016-07-14  9:33       ` Suravee Suthikulpanit
2016-07-14 13:45         ` Radim Krčmář
2016-07-14 13:40       ` Radim Krčmář
2016-07-13 13:20 ` [PART2 PATCH v4 08/11] iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode for pass-through devices Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 09/11] iommu/amd: Enable vAPIC interrupt remapping mode by default Suravee Suthikulpanit
2016-07-13 13:20 ` [PART2 PATCH v4 10/11] svm: Introduce AMD IOMMU avic_ga_log_notifier Suravee Suthikulpanit
2016-07-13 14:29   ` Radim Krčmář
2016-07-14  9:43     ` Suravee Suthikulpanit [this message]
2016-07-14 13:52       ` Radim Krčmář
2016-07-13 13:20 ` [PART2 PATCH v4 11/11] svm: Implements update_pi_irte hook to setup posted interrupt Suravee Suthikulpanit

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