From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752272AbdLEFpD (ORCPT ); Tue, 5 Dec 2017 00:45:03 -0500 Received: from mga14.intel.com ([192.55.52.115]:21880 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751320AbdLEFpC (ORCPT ); Tue, 5 Dec 2017 00:45:02 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,363,1508828400"; d="scan'208";a="181424212" Subject: Re: [PATCH v3 07/16] iommu/vt-d: assign PFSID in device TLB invalidation To: Jacob Pan , iommu@lists.linux-foundation.org, LKML , Joerg Roedel , David Woodhouse , Greg Kroah-Hartman , Rafael Wysocki , Alex Williamson References: <1510944914-54430-1-git-send-email-jacob.jun.pan@linux.intel.com> <1510944914-54430-8-git-send-email-jacob.jun.pan@linux.intel.com> Cc: "Liu, Yi L" , Lan Tianyu , "Tian, Kevin" , Raj Ashok , Jean Delvare , Christoph Hellwig From: Lu Baolu Message-ID: <5A26325C.2030909@linux.intel.com> Date: Tue, 5 Dec 2017 13:45:00 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <1510944914-54430-8-git-send-email-jacob.jun.pan@linux.intel.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 11/18/2017 02:55 AM, Jacob Pan wrote: > When SRIOV VF device IOTLB is invalidated, we need to provide > the PF source SID such that IOMMU hardware can gauge the depth > of invalidation queue which is shared among VFs. This is needed > when device invalidation throttle (DIT) capability is supported. > > Signed-off-by: Jacob Pan > --- > drivers/iommu/intel-iommu.c | 13 +++++++++++++ > include/linux/intel-iommu.h | 3 +++ > 2 files changed, 16 insertions(+) > > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c > index 000b2b3..e1bd219 100644 > --- a/drivers/iommu/intel-iommu.c > +++ b/drivers/iommu/intel-iommu.c > @@ -1459,6 +1459,19 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info) > return; > > pdev = to_pci_dev(info->dev); > + /* For IOMMU that supports device IOTLB throttling (DIT), we assign > + * PFSID to the invalidation desc of a VF such that IOMMU HW can gauge > + * queue depth at PF level. If DIT is not set, PFSID will be treated as > + * reserved, which should be set to 0. > + */ > + if (!ecap_dit(info->iommu->ecap)) > + info->pfsid = 0; > + else if (pdev && pdev->is_virtfn) { > + if (ecap_dit(info->iommu->ecap)) Isn't this condition always true when it comes here? Best regards, Lu Baolu > + dev_warn(&pdev->dev, "SRIOV VF device IOTLB enabled without flow control\n"); > + info->pfsid = PCI_DEVID(pdev->physfn->bus->number, pdev->physfn->devfn); > + } else > + info->pfsid = PCI_DEVID(info->bus, info->devfn); > > #ifdef CONFIG_INTEL_IOMMU_SVM > /* The PCIe spec, in its wisdom, declares that the behaviour of > diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h > index 7f05e36..6956a4e 100644 > --- a/include/linux/intel-iommu.h > +++ b/include/linux/intel-iommu.h > @@ -112,6 +112,7 @@ > * Extended Capability Register > */ > > +#define ecap_dit(e) ((e >> 41) & 0x1) > #define ecap_pasid(e) ((e >> 40) & 0x1) > #define ecap_pss(e) ((e >> 35) & 0x1f) > #define ecap_eafs(e) ((e >> 34) & 0x1) > @@ -285,6 +286,7 @@ enum { > #define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32) > #define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16) > #define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK) > +#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xff0) << 48)) > #define QI_DEV_IOTLB_SIZE 1 > #define QI_DEV_IOTLB_MAX_INVS 32 > > @@ -475,6 +477,7 @@ struct device_domain_info { > struct list_head global; /* link to global list */ > u8 bus; /* PCI bus number */ > u8 devfn; /* PCI devfn number */ > + u16 pfsid; /* SRIOV physical function source ID */ > u8 pasid_supported:3; > u8 pasid_enabled:1; > u8 pri_supported:1;