From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: "Leo Yan" <leo.yan@linaro.org>,
"Arnaldo Carvalho de Melo" <acme@kernel.org>,
"Peter Zijlstra" <peterz@infradead.org>,
"Adrian Hunter" <adrian.hunter@intel.com>,
"Ingo Molnar" <mingo@redhat.com>,
"Mark Rutland" <mark.rutland@arm.com>,
"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
"Jiri Olsa" <jolsa@redhat.com>,
"Namhyung Kim" <namhyung@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Borislav Petkov" <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
"Mathieu Poirier" <mathieu.poirier@linaro.org>,
"Mike Leach" <mike.leach@linaro.org>,
"Michael Petlan" <mpetlan@redhat.com>,
"Frank Ch. Eigler" <fche@redhat.com>,
"Song Liu" <songliubraving@fb.com>,
x86@kernel.org, "Daniel Díaz" <daniel.diaz@linaro.org>,
"Andrii Nakryiko" <andriin@fb.com>,
"Alexei Starovoitov" <ast@kernel.org>,
"Sedat Dilek" <sedat.dilek@gmail.com>,
"Andi Kleen" <ak@linux.intel.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
coresight@lists.linaro.org
Subject: Re: [PATCH v5 3/9] coresight: tmc-etf: Add comment for store ordering
Date: Tue, 14 Sep 2021 09:24:18 +0100 [thread overview]
Message-ID: <60c20d8e-4386-5c54-4607-d9399713d2ef@arm.com> (raw)
In-Reply-To: <20210809111407.596077-4-leo.yan@linaro.org>
On 09/08/2021 12:14, Leo Yan wrote:
> Since the function CS_LOCK() has contained memory barrier mb(), it
> ensures the visibility of the AUX trace data before updating the
> aux_head, thus it's needless to add any explicit barrier anymore.
>
> Add comment to make clear for the barrier usage for ETF.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
> drivers/hwtracing/coresight/coresight-tmc-etf.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> index cd0fb7bfba68..8debd4f40f06 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> @@ -553,6 +553,11 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev,
> if (buf->snapshot)
> handle->head += to_read;
>
> + /*
> + * CS_LOCK() contains mb() so it can ensure visibility of the AUX trace
> + * data before the aux_head is updated via perf_aux_output_end(), which
> + * is expected by the perf ring buffer.
> + */
> CS_LOCK(drvdata->base);
> out:
> spin_unlock_irqrestore(&drvdata->spinlock, flags);
>
I will queue this.
Thanks
Suzuki
next prev parent reply other threads:[~2021-09-14 8:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-09 11:13 [PATCH v5 0/9] perf: Refine barriers for AUX ring buffer Leo Yan
2021-08-09 11:13 ` [PATCH v5 1/9] perf/ring_buffer: Add comment for barriers on " Leo Yan
2021-08-29 10:51 ` Leo Yan
2021-08-09 11:14 ` [PATCH v5 2/9] coresight: tmc-etr: Add barrier after updating " Leo Yan
2021-08-29 10:55 ` Leo Yan
2021-09-14 9:08 ` Suzuki K Poulose
2021-08-09 11:14 ` [PATCH v5 3/9] coresight: tmc-etf: Add comment for store ordering Leo Yan
2021-09-14 8:24 ` Suzuki K Poulose [this message]
2021-08-09 11:14 ` [PATCH v5 4/9] perf/x86: Add compiler barrier after updating BTS Leo Yan
2021-08-29 10:56 ` Leo Yan
2021-09-14 9:51 ` Peter Zijlstra
2021-09-14 10:05 ` Leo Yan
2021-09-14 11:47 ` Peter Zijlstra
2021-09-17 15:10 ` [tip: perf/core] " tip-bot2 for Leo Yan
2021-08-09 11:14 ` [PATCH v5 5/9] perf auxtrace: Use WRITE_ONCE() for updating aux_tail Leo Yan
2021-08-09 19:59 ` Arnaldo Carvalho de Melo
2021-08-09 11:14 ` [PATCH v5 6/9] perf auxtrace: Drop legacy __sync functions Leo Yan
2021-08-09 20:00 ` Arnaldo Carvalho de Melo
2021-08-09 11:14 ` [PATCH v5 7/9] perf auxtrace: Remove auxtrace_mmap__read_snapshot_head() Leo Yan
2021-08-09 20:01 ` Arnaldo Carvalho de Melo
2021-08-09 11:14 ` [PATCH v5 8/9] perf: Cleanup for HAVE_SYNC_COMPARE_AND_SWAP_SUPPORT Leo Yan
2021-08-09 20:02 ` Arnaldo Carvalho de Melo
2021-08-09 11:14 ` [PATCH v5 9/9] tools: Remove feature-sync-compare-and-swap feature detection Leo Yan
2021-08-09 20:02 ` Arnaldo Carvalho de Melo
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