From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9FF6C433F5 for ; Fri, 11 Feb 2022 22:00:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348780AbiBKWAl (ORCPT ); Fri, 11 Feb 2022 17:00:41 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:36044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353923AbiBKWAc (ORCPT ); Fri, 11 Feb 2022 17:00:32 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2B34CD7 for ; Fri, 11 Feb 2022 14:00:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644616828; x=1676152828; h=message-id:date:mime-version:to:cc:references:from: subject:in-reply-to:content-transfer-encoding; bh=CITimWb5ieMVL8+eI+RkkxN4zcJlsfWrf99ICqoKahE=; b=VVKlbFYIDO5KMCcfKN+wbf6V3ZTb8kd+zXEukhYAFzXu+8s/CilCVYw9 sUni1gEdEaweWhDArTVHs1q5xhclMe8s+sOeT8JVxj/9qoazpxJX0RCc5 IXORyXR97ZRcR4fLyvjiK2fZpOS7KL91iWnY9xM+CALrEQ0BF7xhZxmxM oB6iNZbJSDEyIJL3aDjUZ9h9QUVhJTWZ2mFUqHUiNDPkomAaqfIjfRnTz 5v0zTok9sEzAIaTWlDEVJ3e8heB009dlv/Z7fVvZ+vE9n6fb7jJggC1RB rm9d9ALbzrc/rQyO1VwnU6Dcxrt/I647eI4AL1bX5gI2qTeboBJQCqf9n A==; X-IronPort-AV: E=McAfee;i="6200,9189,10255"; a="229782269" X-IronPort-AV: E=Sophos;i="5.88,361,1635231600"; d="scan'208";a="229782269" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 14:00:28 -0800 X-IronPort-AV: E=Sophos;i="5.88,361,1635231600"; d="scan'208";a="542257070" Received: from nsmdimra-mobl.amr.corp.intel.com (HELO [10.209.96.127]) ([10.209.96.127]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 14:00:27 -0800 Message-ID: <79060ea1-8392-58d7-5a27-ff173e830403@intel.com> Date: Fri, 11 Feb 2022 14:00:24 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Content-Language: en-US To: Fenghua Yu , Thomas Gleixner , Dave Hansen , Ingo Molnar , Borislav Petkov , Peter Zijlstra , Andy Lutomirski , Tony Luck , Lu Baolu , Joerg Roedel , Josh Poimboeuf , Jacob Pan , Ashok Raj , Ravi V Shankar Cc: iommu@lists.linux-foundation.org, x86 , linux-kernel References: <20220207230254.3342514-1-fenghua.yu@intel.com> <20220207230254.3342514-6-fenghua.yu@intel.com> From: Dave Hansen Subject: Re: [PATCH v4 05/11] iommu/sva: Assign a PASID to mm on PASID allocation and free it on mm exit In-Reply-To: <20220207230254.3342514-6-fenghua.yu@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/7/22 15:02, Fenghua Yu wrote: ... > Get rid of the refcounting mechanisms and replace/rename the interfaces > to reflect this new approach. ... > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 5 +-- > drivers/iommu/intel/iommu.c | 4 +- > drivers/iommu/intel/svm.c | 9 ----- > drivers/iommu/ioasid.c | 39 ++----------------- > drivers/iommu/iommu-sva-lib.c | 39 ++++++------------- > drivers/iommu/iommu-sva-lib.h | 1 - > include/linux/ioasid.h | 12 +----- > include/linux/sched/mm.h | 16 ++++++++ > kernel/fork.c | 1 + > 9 files changed, 38 insertions(+), 88 deletions(-) Given the heavily non-x86 diffstat here, I was hoping to see some acks from folks that this might affect, especially on the ARM side. Is everyone OK with this?