Re: [PATCH v2 5/6] kvm: x86: Emulate MSR IA32_CORE_CAPABILITIES

From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Andy Lutomirski <luto@amacapital.net>,
	x86@kernel.org, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	David Laight <David.Laight@aculab.com>
Subject: Re: [PATCH v2 5/6] kvm: x86: Emulate MSR IA32_CORE_CAPABILITIES
Date: Tue, 4 Feb 2020 17:19:26 +0800	[thread overview]
Message-ID: <829bd606-6852-121f-0d95-e9f1d35a3dde@intel.com> (raw)
In-Reply-To: <20200203214300.GI19638@linux.intel.com>

On 2/4/2020 5:43 AM, Sean Christopherson wrote:
> On Mon, Feb 03, 2020 at 11:16:07PM +0800, Xiaoyao Li wrote:
>> Emulate MSR_IA32_CORE_CAPABILITIES in software and unconditionally
>> advertise its support to userspace. Like MSR_IA32_ARCH_CAPABILITIES, it
>> is a feature-enumerating MSR and can be fully emulated regardless of
>> hardware support. Existence of CORE_CAPABILITIES is enumerated via
>> CPUID.(EAX=7H,ECX=0):EDX[30].
>>
>> Note, support for individual features enumerated via CORE_CAPABILITIES,
>> e.g., split lock detection, will be added in future patches.
>>
>> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
>> ---
>>   arch/x86/include/asm/kvm_host.h |  1 +
>>   arch/x86/kvm/cpuid.c            |  5 +++--
>>   arch/x86/kvm/x86.c              | 22 ++++++++++++++++++++++
>>   3 files changed, 26 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>> index 329d01c689b7..dc231240102f 100644
>> --- a/arch/x86/include/asm/kvm_host.h
>> +++ b/arch/x86/include/asm/kvm_host.h
>> @@ -591,6 +591,7 @@ struct kvm_vcpu_arch {
>>   	u64 ia32_xss;
>>   	u64 microcode_version;
>>   	u64 arch_capabilities;
>> +	u64 core_capabilities;
>>   
>>   	/*
>>   	 * Paging state of the vcpu
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index b1c469446b07..7282d04f3a6b 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -409,10 +409,11 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
>>   		    boot_cpu_has(X86_FEATURE_AMD_SSBD))
>>   			entry->edx |= F(SPEC_CTRL_SSBD);
>>   		/*
>> -		 * We emulate ARCH_CAPABILITIES in software even
>> -		 * if the host doesn't support it.
>> +		 * ARCH_CAPABILITIES and CORE_CAPABILITIES are emulated in
>> +		 * software regardless of host support.
>>   		 */
>>   		entry->edx |= F(ARCH_CAPABILITIES);
>> +		entry->edx |= F(CORE_CAPABILITIES);
>>   		break;
>>   	case 1:
>>   		entry->eax &= kvm_cpuid_7_1_eax_x86_features;
>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>> index 821b7404c0fd..a97a8f5dd1df 100644
>> --- a/arch/x86/kvm/x86.c
>> +++ b/arch/x86/kvm/x86.c
>> @@ -1222,6 +1222,7 @@ static const u32 emulated_msrs_all[] = {
>>   	MSR_IA32_TSC_ADJUST,
>>   	MSR_IA32_TSCDEADLINE,
>>   	MSR_IA32_ARCH_CAPABILITIES,
>> +	MSR_IA32_CORE_CAPS,
>>   	MSR_IA32_MISC_ENABLE,
>>   	MSR_IA32_MCG_STATUS,
>>   	MSR_IA32_MCG_CTL,
>> @@ -1288,6 +1289,7 @@ static const u32 msr_based_features_all[] = {
>>   	MSR_F10H_DECFG,
>>   	MSR_IA32_UCODE_REV,
>>   	MSR_IA32_ARCH_CAPABILITIES,
>> +	MSR_IA32_CORE_CAPS,
>>   };
>>   
>>   static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
>> @@ -1341,12 +1343,20 @@ static u64 kvm_get_arch_capabilities(void)
>>   	return data;
>>   }
>>   
>> +static u64 kvm_get_core_capabilities(void)
>> +{
>> +	return 0;
>> +}
>> +
>>   static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
>>   {
>>   	switch (msr->index) {
>>   	case MSR_IA32_ARCH_CAPABILITIES:
>>   		msr->data = kvm_get_arch_capabilities();
>>   		break;
>> +	case MSR_IA32_CORE_CAPS:
>> +		msr->data = kvm_get_core_capabilities();
>> +		break;
>>   	case MSR_IA32_UCODE_REV:
>>   		rdmsrl_safe(msr->index, &msr->data);
>>   		break;
>> @@ -2716,6 +2726,11 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>>   			return 1;
>>   		vcpu->arch.arch_capabilities = data;
>>   		break;
>> +	case MSR_IA32_CORE_CAPS:
>> +		if (!msr_info->host_initiated)
> 
> Shouldn't @data be checked against kvm_get_core_capabilities()?

Maybe it's for the case that userspace might have the ability to emulate 
SLD feature? And we usually let userspace set whatever it wants, e.g., 
ARCH_CAPABILITIES.

Anyway, I have no objection to add this check.

>> +			return 1;
>> +		vcpu->arch.core_capabilities = data;
>> +		break;
>>   	case MSR_EFER:
>>   		return set_efer(vcpu, msr_info);
>>   	case MSR_K7_HWCR:
>> @@ -3044,6 +3059,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>>   			return 1;
>>   		msr_info->data = vcpu->arch.arch_capabilities;
>>   		break;
>> +	case MSR_IA32_CORE_CAPS:
>> +		if (!msr_info->host_initiated &&
>> +		    !guest_cpuid_has(vcpu, X86_FEATURE_CORE_CAPABILITIES))
>> +			return 1;
>> +		msr_info->data = vcpu->arch.core_capabilities;
>> +		break;
>>   	case MSR_IA32_POWER_CTL:
>>   		msr_info->data = vcpu->arch.msr_ia32_power_ctl;
>>   		break;
>> @@ -9288,6 +9309,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
>>   		goto free_guest_fpu;
>>   
>>   	vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
>> +	vcpu->arch.core_capabilities = kvm_get_core_capabilities();
>>   	vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
>>   	kvm_vcpu_mtrr_init(vcpu);
>>   	vcpu_load(vcpu);
>> -- 
>> 2.23.0
>>