From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B44BC47084 for ; Mon, 24 May 2021 19:01:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6EE5461360 for ; Mon, 24 May 2021 19:01:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233411AbhEXTDH (ORCPT ); Mon, 24 May 2021 15:03:07 -0400 Received: from mga05.intel.com ([192.55.52.43]:60158 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233038AbhEXTDD (ORCPT ); Mon, 24 May 2021 15:03:03 -0400 IronPort-SDR: XhwgcM9DXuJrZkTBujnPPtr9nSvLYsWk5vnd0Qf0QtTJPtmvGbfBcyoYr3f/qHsuAjIUrWeNnn hGOqwoxVEtgg== X-IronPort-AV: E=McAfee;i="6200,9189,9993"; a="287578054" X-IronPort-AV: E=Sophos;i="5.82,325,1613462400"; d="scan'208";a="287578054" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2021 12:01:33 -0700 IronPort-SDR: FZK/D5upNX7zZ71hyU8iOibDUc93w6Wps6qzVJ5oCvRuBzWisT0tqWl4Jmkmnq73AueVz2uaZm bXeRo4VyQBhA== X-IronPort-AV: E=Sophos;i="5.82,325,1613462400"; d="scan'208";a="435385494" Received: from yyu32-mobl1.amr.corp.intel.com (HELO [10.255.72.237]) ([10.255.72.237]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2021 12:01:31 -0700 Subject: Re: [PATCH v24 9/9] x86/vdso: Add ENDBR to __vdso_sgx_enter_enclave To: Sean Christopherson Cc: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang , Jarkko Sakkinen References: <20210401221403.32253-1-yu-cheng.yu@intel.com> <20210401221403.32253-10-yu-cheng.yu@intel.com> From: "Yu, Yu-cheng" Message-ID: <8bc0bfb1-27f4-541e-f80c-97d16d5733bb@intel.com> Date: Mon, 24 May 2021 12:01:29 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.10.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/24/2021 11:51 AM, Sean Christopherson wrote: > On Thu, Apr 01, 2021, Yu-cheng Yu wrote: >> ENDBR is a special new instruction for the Indirect Branch Tracking (IBT) >> component of CET. IBT prevents attacks by ensuring that (most) indirect >> branches and function calls may only land at ENDBR instructions. Branches >> that don't follow the rules will result in control flow (#CF) exceptions. >> >> ENDBR is a noop when IBT is unsupported or disabled. Most ENDBR >> instructions are inserted automatically by the compiler, but branch >> targets written in assembly must have ENDBR added manually. >> >> Add ENDBR to __vdso_sgx_enter_enclave() branch targets. > ^ > |- indirect > > After reading the changelog, I was expecting ENDBR on every label. > Sorry about the confusion. >> Signed-off-by: Yu-cheng Yu >> Cc: Andy Lutomirski >> Cc: Borislav Petkov >> Cc: Dave Hansen >> Cc: Jarkko Sakkinen >> Cc: Peter Zijlstra >> --- >> arch/x86/entry/vdso/vsgx.S | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/x86/entry/vdso/vsgx.S b/arch/x86/entry/vdso/vsgx.S >> index 86a0e94f68df..c63eafa54abd 100644 >> --- a/arch/x86/entry/vdso/vsgx.S >> +++ b/arch/x86/entry/vdso/vsgx.S >> @@ -4,6 +4,7 @@ >> #include >> #include >> #include >> +#include >> >> #include "extable.h" >> >> @@ -27,6 +28,7 @@ >> SYM_FUNC_START(__vdso_sgx_enter_enclave) >> /* Prolog */ >> .cfi_startproc >> + ENDBR >> push %rbp >> .cfi_adjust_cfa_offset 8 >> .cfi_rel_offset %rbp, 0 >> @@ -62,6 +64,7 @@ SYM_FUNC_START(__vdso_sgx_enter_enclave) >> .Lasync_exit_pointer: >> .Lenclu_eenter_eresume: >> enclu >> + ENDBR > > It would be better to move this below the comment about EEXIT. As is, it looks > like a misplaced annotation on the AEP. The AEP doesn't need ENDBR, it's the > EEXIT target that needs ENDBR because EEXIT is treated as an indirect branch. > > Might also be helpful for future readers to explicitly state in the changelog > that EEXIT is considered an indirect branch. > > I.e. > >> /* EEXIT jumps here unless the enclave is doing something fancy. */ > ENDBR >> mov SGX_ENCLAVE_OFFSET_OF_RUN(%rbp), %rbx >> @@ -91,6 +94,7 @@ SYM_FUNC_START(__vdso_sgx_enter_enclave) >> jmp .Lout >> >> .Lhandle_exception: >> + ENDBR >> mov SGX_ENCLAVE_OFFSET_OF_RUN(%rbp), %rbx >> >> /* Set the exception info. */ Thanks, I will fix that. Yu-cheng