From: "Saripalli, RK" <rsaripal@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>
Subject: Re: [PATCH 1/5] x86/cpufeatures: Define feature bits to support mitigation of PSF
Date: Fri, 9 Apr 2021 14:45:23 -0500 [thread overview]
Message-ID: <9dea10b1-bbac-3ed2-6255-8453570d857e@amd.com> (raw)
In-Reply-To: <20210409193929.GI15567@zn.tnic>
Boris, thank you.
On 4/9/2021 2:39 PM, Borislav Petkov wrote:
> On Fri, Apr 09, 2021 at 01:22:49PM -0500, Saripalli, RK wrote:
>>> And I think you don't need this one either if we do a "light" controls
>>> thing but lemme look at the rest first.
>
> Ok, and what I mean with "lite" version is something like this below
> which needs finishing and testing.
>
> Initially, it could support the cmdline params:
>
> predict_store_fwd={on,off,auto}
>
> to give people the opportunity to experiment with the feature.
>
> If it turns out that prctl and seccomp per-task toggling is needed then
> sure, we can extend but I don't see the reason for a whole separate set
> of options yet. Especially is ssbd already controls this.
>
> AFAICT, of course and if I'm not missing some other aspect here.
>
> Thx.
Yes, these options should be fine for now.
Like you said, if we get the need to add prctl and seccomp, I can always do that later.
What do you think auto should default to?.
In SSBD case, I believe auto defaults to prctl or seccomp.
Since we will not have that here, we should choose something for auto.
>
> ---
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index 2d11384dc9ab..226b73700f88 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -1165,3 +1165,22 @@ void set_dr_addr_mask(unsigned long mask, int dr)
> break;
> }
> }
> +
> +static int __init psf_cmdline(char *str)
> +{
> + if (!boot_cpu_has(X86_FEATURE_PSFD))
> + return 0;
> +
> + if (!str)
> + return -EINVAL;
> +
> + if (!strcmp(str, "off")) {
> + x86_spec_ctrl_base |= SPEC_CTRL_PSFD;
> + setup_clear_cpu_cap(X86_FEATURE_PSFD);
> + }
> +
> + return 0;
> +}
> +early_param("predict_store_fwd", psf_cmdline);
> +
> +
>
All the other mitigation x86 mitigation code goes into kernel/cpu/bugs.c.
I think psf_cmdline() or equivalent also belongs there and not in kernel/cpu/amd.c.
Looking forward to your feedback.
Thanks,
RK
next prev parent reply other threads:[~2021-04-09 19:45 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-06 15:49 [PATCH 0/5] Introduce support for PSF mitigation Ramakrishna Saripalli
2021-04-06 15:50 ` [PATCH 1/5] x86/cpufeatures: Define feature bits to support mitigation of PSF Ramakrishna Saripalli
2021-04-09 17:41 ` Borislav Petkov
2021-04-09 18:22 ` Saripalli, RK
2021-04-09 19:39 ` Borislav Petkov
2021-04-09 19:45 ` Saripalli, RK [this message]
2021-04-09 20:19 ` Borislav Petkov
2021-04-09 20:29 ` Saripalli, RK
2021-04-06 15:50 ` [PATCH 2/5] x86/speculation: Implement support for PSFD detection and reporting Ramakrishna Saripalli
2021-04-06 15:50 ` [PATCH 3/5] x86/speculation: Introduce SPEC_CTRL_MSR bit for PSFD Ramakrishna Saripalli
2021-04-06 15:50 ` [PATCH 4/5] x86/speculation: Implement PSF mitigation support Ramakrishna Saripalli
2021-04-06 15:50 ` [PATCH 5/5] x86/speculation: Add PSF mitigation kernel parameters Ramakrishna Saripalli
2021-04-06 17:26 ` [PATCH 0/5] Introduce support for PSF mitigation Borislav Petkov
2021-04-07 22:39 ` Josh Poimboeuf
2021-04-08 14:56 ` Saripalli, RK
2021-04-09 9:07 ` Borislav Petkov
2021-04-09 16:45 ` Josh Poimboeuf
2021-04-09 16:50 ` Saripalli, RK
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