From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: claudiu beznea <claudiu.beznea@tuxon.dev>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [RFC PATCH 07/13] pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH
Date: Thu, 28 Mar 2024 19:40:31 +0000 [thread overview]
Message-ID: <CA+V-a8vcyxrEmHrhgwDf2bhL1QpiXW6r1+aoH3my3uAJZfCtQA@mail.gmail.com> (raw)
In-Reply-To: <c200e87e-1c65-4926-9307-16229e90594e@tuxon.dev>
Hi Claudiu,
Thank you for the review.
On Thu, Mar 28, 2024 at 8:01 AM claudiu beznea <claudiu.beznea@tuxon.dev> wrote:
>
> Hi, Prabhakar,
>
> On 27.03.2024 00:28, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > On RZ/V2H(P) SoC, the power registers for SD and ETH do not exist,
> > resulting in invalid register offsets. Ensure that the register offsets
> > are valid before any read/write operations are performed. If the power
> > registers are not available, both SD and ETH will be set to -EINVAL.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 16 ++++++++++------
> > 1 file changed, 10 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > index 348fdccaff72..705372faaeff 100644
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -184,8 +184,8 @@
> > */
> > struct rzg2l_register_offsets {
> > u16 pwpr;
> > - u16 sd_ch;
> > - u16 eth_poc;
> > + int sd_ch;
> > + int eth_poc;
> > };
> >
> > /**
> > @@ -2567,8 +2567,10 @@ static int rzg2l_pinctrl_suspend_noirq(struct device *dev)
> > rzg2l_pinctrl_pm_setup_dedicated_regs(pctrl, true);
> >
> > for (u8 i = 0; i < 2; i++) {
> > - cache->sd_ch[i] = readb(pctrl->base + SD_CH(regs->sd_ch, i));
> > - cache->eth_poc[i] = readb(pctrl->base + ETH_POC(regs->eth_poc, i));
> > + if (regs->sd_ch != -EINVAL)
>
> As of my knowledge, the current users of this driver uses SD and ETH
> offsets different from zero. To avoid populating these values for all the
> SoCs and avoid increasing the size of these fields I think you can add
> checks like these:
>
> if (regs->sd_ch)
> // set sd_ch
>
Agreed.
>
> Same for the rest.
>
OK.
Cheers,
Prabhakar
next prev parent reply other threads:[~2024-03-28 19:40 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-26 22:28 [RFC PATCH 00/13] Add PFC support for Renesas RZ/V2H(P) SoC Prabhakar
2024-03-26 22:28 ` [RFC PATCH 01/13] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object Prabhakar
2024-03-27 17:16 ` Rob Herring
2024-03-26 22:28 ` [RFC PATCH 02/13] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC Prabhakar
2024-03-27 17:24 ` Rob Herring
2024-03-27 18:58 ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 03/13] pinctrl: renesas: pinctrl-rzg2l: Remove extra space in function parameter Prabhakar
2024-03-26 22:28 ` [RFC PATCH 04/13] pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration Prabhakar
2024-03-26 22:28 ` [RFC PATCH 05/13] pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures Prabhakar
2024-03-26 22:28 ` [RFC PATCH 06/13] pinctrl: renesas: pinctrl-rzg2l: Make cfg to u64 in struct rzg2l_variable_pin_cfg Prabhakar
2024-03-28 14:13 ` Geert Uytterhoeven
2024-03-28 19:53 ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 07/13] pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH Prabhakar
2024-03-27 7:58 ` Dan Carpenter
2024-03-27 8:13 ` Lad, Prabhakar
2024-03-28 8:01 ` claudiu beznea
2024-03-28 19:40 ` Lad, Prabhakar [this message]
2024-03-26 22:28 ` [RFC PATCH 08/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for writing to PFC Prabhakar
2024-03-28 8:02 ` claudiu beznea
2024-03-28 8:13 ` claudiu beznea
2024-03-28 19:45 ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 09/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register Prabhakar
2024-03-26 22:28 ` [RFC PATCH 10/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for reading/writing OEN register Prabhakar
2024-03-26 22:28 ` [RFC PATCH 11/13] pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to pinconf_generic_parse_dt_config() Prabhakar
2024-03-26 22:28 ` [RFC PATCH 12/13] pinctrl: renesas: pinctrl-rzg2l: Add support to pass custom params Prabhakar
2024-03-26 22:28 ` [RFC PATCH 13/13] pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC Prabhakar
2024-03-28 8:04 ` claudiu beznea
2024-03-28 19:51 ` Lad, Prabhakar
2024-03-29 6:36 ` claudiu beznea
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