From: Will McVicker <willmcvicker@google.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Chanwoo Choi <cw00.choi@samsung.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Michael Turquette <mturquette@baylibre.com>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Tomasz Figa <tomasz.figa@gmail.com>,
"Cc: Android Kernel" <kernel-team@android.com>,
linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 1/2] [RFT] clk: samsung: add support for CPU clocks
Date: Thu, 14 Oct 2021 12:35:57 -0700 [thread overview]
Message-ID: <CABYd82a7G7jAOMr=yjpkG6sbH+g0-r36NKSBwVEDZeEthuTTLA@mail.gmail.com> (raw)
In-Reply-To: <163417617897.936110.4798836682696423903@swboyd.mtv.corp.google.com>
On Wed, Oct 13, 2021 at 6:49 PM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Will McVicker (2021-10-13 15:10:19)
> > diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c
> > index 00ef4d1b0888..b5017934fc41 100644
> > --- a/drivers/clk/samsung/clk-cpu.c
> > +++ b/drivers/clk/samsung/clk-cpu.c
> > @@ -469,3 +469,29 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,
> > kfree(cpuclk);
> > return ret;
> > }
> > +
> > +void samsung_clk_register_cpu(struct samsung_clk_provider *ctx,
> > + const struct samsung_cpu_clock *list, unsigned int nr_clk)
> > +{
> > + unsigned int idx;
> > + unsigned int num_cfgs;
> > + struct clk *parent_clk, *alt_parent_clk;
> > + const struct clk_hw *parent_clk_hw = NULL;
> > + const struct clk_hw *alt_parent_clk_hw = NULL;
> > +
> > + for (idx = 0; idx < nr_clk; idx++, list++) {
> > + /* find count of configuration rates in cfg */
> > + for (num_cfgs = 0; list->cfg[num_cfgs].prate != 0; )
> > + num_cfgs++;
> > +
> > + parent_clk = __clk_lookup(list->parent_name);
>
> Please stop using __clk_lookup()
Thanks, I believe I have a way around this. I'll fix this up in the
follow-up version.
>
> > + if (parent_clk)
> > + parent_clk_hw = __clk_get_hw(parent_clk);
> > + alt_parent_clk = __clk_lookup(list->alt_parent_name);
>
> Can the DT binding be updated?
Are you referring to removing alt_parent and just adding it as another
parent clock?
>
> > + if (alt_parent_clk)
> > + alt_parent_clk_hw = __clk_get_hw(alt_parent_clk);
> > +
> > + exynos_register_cpu_clock(ctx, list->id, list->name, parent_clk_hw,
> > + alt_parent_clk_hw, list->offset, list->cfg, num_cfgs, list->flags);
> > + }
> > +}
> > diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
> > index 1949ae7851b2..336243c6f120 100644
> > --- a/drivers/clk/samsung/clk.c
> > +++ b/drivers/clk/samsung/clk.c
> > @@ -378,6 +378,8 @@ struct samsung_clk_provider * __init samsung_cmu_register_one(
> > samsung_clk_extended_sleep_init(reg_base,
> > cmu->clk_regs, cmu->nr_clk_regs,
> > cmu->suspend_regs, cmu->nr_suspend_regs);
> > + if (cmu->cpu_clks)
> > + samsung_clk_register_cpu(ctx, cmu->cpu_clks, cmu->nr_cpu_clks);
> >
> > samsung_clk_of_add_provider(np, ctx);
> >
> > diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
> > index c1e1a6b2f499..a52a38cc1740 100644
> > --- a/drivers/clk/samsung/clk.h
> > +++ b/drivers/clk/samsung/clk.h
> > @@ -271,6 +271,27 @@ struct samsung_pll_clock {
> > __PLL(_typ, _id, _name, _pname, CLK_GET_RATE_NOCACHE, _lock, \
> > _con, _rtable)
> >
> > +struct samsung_cpu_clock {
> > + unsigned int id;
> > + const char *name;
> > + const char *parent_name;
> > + const char *alt_parent_name;
> > + unsigned long flags;
> > + int offset;
> > + const struct exynos_cpuclk_cfg_data *cfg;
> > +};
> > +
> > +#define CPU_CLK(_id, _name, _pname, _apname, _flags, _offset, _cfg) \
> > + { \
> > + .id = _id, \
> > + .name = _name, \
> > + .parent_name = _pname, \
> > + .alt_parent_name = _apname, \
> > + .flags = _flags, \
> > + .offset = _offset, \
> > + .cfg = _cfg, \
> > + }
> > +
> > struct samsung_clock_reg_cache {
> > struct list_head node;
> > void __iomem *reg_base;
> > @@ -301,6 +322,9 @@ struct samsung_cmu_info {
> > unsigned int nr_fixed_factor_clks;
> > /* total number of clocks with IDs assigned*/
> > unsigned int nr_clk_ids;
> > + /* list of cpu clocks and respective count */
> > + const struct samsung_cpu_clock *cpu_clks;
> > + unsigned int nr_cpu_clks;
> >
> > /* list and number of clocks registers */
> > const unsigned long *clk_regs;
> > @@ -350,6 +374,8 @@ extern void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
> > extern void __init samsung_clk_register_pll(struct samsung_clk_provider *ctx,
> > const struct samsung_pll_clock *pll_list,
> > unsigned int nr_clk, void __iomem *base);
> > +extern void __init samsung_clk_register_cpu(struct samsung_clk_provider *ctx,
>
> __init in header files is useless.
Thanks for pointing that out. Looks like this header needs some cleaning up.
>
> > + const struct samsung_cpu_clock *list, unsigned int nr_clk);
> >
next prev parent reply other threads:[~2021-10-14 19:36 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20211013221032eucas1p1d8e2fcc36d3f021aa86cb846df0ed6da@eucas1p1.samsung.com>
2021-10-13 22:10 ` [RFT PATCH v3 0/2] clk: samsung: add common support for CPU clocks Will McVicker
2021-10-13 22:10 ` [PATCH v3 1/2] [RFT] clk: samsung: add " Will McVicker
2021-10-14 1:49 ` Stephen Boyd
2021-10-14 19:35 ` Will McVicker [this message]
2021-10-14 21:40 ` Stephen Boyd
2021-10-15 14:36 ` Sylwester Nawrocki
2021-10-13 22:10 ` [PATCH v3 2/2] [RFT] clk: samsung: exynos5433: update apollo and atlas clock probing Will McVicker
2021-10-14 8:33 ` [RFT PATCH v3 0/2] clk: samsung: add common support for CPU clocks Marek Szyprowski
2021-10-14 19:46 ` Will McVicker
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