From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752207AbdAaOGy (ORCPT ); Tue, 31 Jan 2017 09:06:54 -0500 Received: from mail-io0-f178.google.com ([209.85.223.178]:35573 "EHLO mail-io0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752057AbdAaOGi (ORCPT ); Tue, 31 Jan 2017 09:06:38 -0500 MIME-Version: 1.0 In-Reply-To: <20170125185207.23902-4-paul@crapouillou.net> References: <27071da2f01d48141e8ac3dfaa13255d@mail.crapouillou.net> <20170125185207.23902-1-paul@crapouillou.net> <20170125185207.23902-4-paul@crapouillou.net> From: Linus Walleij Date: Tue, 31 Jan 2017 15:05:43 +0100 Message-ID: Subject: Re: [PATCH v3 03/14] pinctrl-ingenic: add a pinctrl driver for the Ingenic jz47xx SoCs To: Paul Cercueil Cc: Rob Herring , Mark Rutland , Ralf Baechle , Ulf Hansson , Boris Brezillon , Thierry Reding , Bartlomiej Zolnierkiewicz , Maarten ter Huurne , Lars-Peter Clausen , Paul Burton , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Linux MIPS , "linux-mmc@vger.kernel.org" , "linux-mtd@lists.infradead.org" , "linux-pwm@vger.kernel.org" , "linux-fbdev@vger.kernel.org" , James Hogan Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 25, 2017 at 7:51 PM, Paul Cercueil wrote: > This driver handles pin configuration and pin muxing for the > JZ4740 and JZ4780 SoCs from Ingenic. > > Signed-off-by: Paul Cercueil This is starting to look very nice. > +#include > +#include Use if it is a GPIO driver. I should be enough ... I think. > +static int ingenic_pinctrl_parse_dt_func(struct ingenic_pinctrl *jzpc, > + struct device_node *np) > +{ > + unsigned int num_groups; > + struct device_node *group_node; > + unsigned int i, j; > + int err, npins, *pins, *confs; > + const char **groups; > + > + num_groups = of_get_child_count(np); > + groups = devm_kzalloc(jzpc->dev, > + sizeof(*groups) * num_groups, GFP_KERNEL); > + if (!groups) > + return -ENOMEM; > + > + i = 0; > + for_each_child_of_node(np, group_node) { > + groups[i++] = group_node->name; > + > + npins = of_property_count_elems_of_size(group_node, > + "ingenic,pins", 8); > + if (npins < 0) > + return npins; > + > + pins = devm_kzalloc(jzpc->dev, > + sizeof(*pins) * npins, GFP_KERNEL); > + confs = devm_kzalloc(jzpc->dev, > + sizeof(*confs) * npins, GFP_KERNEL); > + if (!pins || !confs) > + return -ENOMEM; > + > + for (j = 0; j < npins; j++) { > + of_property_read_u32_index(group_node, > + "ingenic,pins", j * 2, &pins[j]); > + > + of_property_read_u32_index(group_node, > + "ingenic,pins", j * 2 + 1, &confs[j]); If I didn't mention before this could pperhaps just use "pins"? Or does these DT entries not match the generic bindings? > + } > + > + err = pinctrl_generic_add_group(jzpc->pctl, group_node->name, > + pins, npins, confs); > + if (err) > + return err; > + } > + > + return pinmux_generic_add_function(jzpc->pctl, np->name, > + groups, num_groups, NULL); > +} If you just use "pins" can this even be parsed by a generic parser function pinconf_generic_dt_subnode_to_map()? Yours, Linus Walleij