Re: [PATCH] pinctrl: cy8c95x0: Cache muxed registers

From: Linus Walleij <linus.walleij@linaro.org>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>,
	naresh.solanki@9elements.com,  linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] pinctrl: cy8c95x0: Cache muxed registers
Date: Tue, 14 May 2024 09:49:22 +0200	[thread overview]
Message-ID: <CACRpkdbUye6RhbRNGn6sapARwVUyi5hKS-5VEVBr6ZR6W_KdQw@mail.gmail.com> (raw)
In-Reply-To: <ZkL2Sdf0NcqaZRZ4@surfacebook.localdomain>

On Tue, May 14, 2024 at 7:27 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
> Tue, Dec 19, 2023 at 01:53:49PM +0100, Patrick Rudolph kirjoitti:
> > Currently the port specific registers behind the PORTSEL mux aren't
> > cached in the regmap and thus the typical setup time for a single pin
> > on cy8c9560 is about 200msec on our system. The hotspot is the IRQ
> > (un)masking, which causes lots of R/W operations.
> >
> > Introduce a separate regmap for muxed registers and helper functions
> > to use the newly introduced regmap for muxed register access under
> > the i2c lock.
> >
> > With the new cache in place the typical pin setup time is reduced to
> > 20msec, making it about 10 times faster. As a side effect the system
> > boot time is also reduced by 50%.
>
> Interestingly that you have not Cc'ed me on your patches.
> This, btw, a good reinvetion of a wheel which regmap supports already.

Also sloppy reviewing from my side :(

Patrick can you look into making a patch on top of this
that switches the code to use the built-in caching in regmap
insted of rolling your own?

Yours,
Linus Walleij