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[209.85.217.41]) by smtp.gmail.com with ESMTPSA id u1sm58281uap.6.2020.12.03.12.06.23 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 03 Dec 2020 12:06:23 -0800 (PST) Received: by mail-vs1-f41.google.com with SMTP id j140so1977320vsd.4 for ; Thu, 03 Dec 2020 12:06:23 -0800 (PST) X-Received: by 2002:a67:4242:: with SMTP id p63mr1071347vsa.34.1607025982604; Thu, 03 Dec 2020 12:06:22 -0800 (PST) MIME-Version: 1.0 References: <20201202214935.1114381-1-swboyd@chromium.org> <160695172591.2717324.17788035024164242534@swboyd.mtv.corp.google.com> <160695644776.2717324.633265815704005177@swboyd.mtv.corp.google.com> In-Reply-To: <160695644776.2717324.633265815704005177@swboyd.mtv.corp.google.com> From: Doug Anderson Date: Thu, 3 Dec 2020 12:06:10 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] spi: spi-geni-qcom: Use the new method of gpio CS control To: Stephen Boyd Cc: Alexandru M Stan , Mark Brown , linux-kernel , linux-arm-msm , linux-spi , Akash Asthana , Bjorn Andersson , Benson Leung , Enric Balletbo i Serra Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Dec 2, 2020 at 4:47 PM Stephen Boyd wrote: > > Quoting Stephen Boyd (2020-12-02 15:28:45) > > Quoting Alexandru M Stan (2020-12-02 14:18:20) > > > Unfortunately this patch makes my cros-ec (the main EC that used to > > > work even before my debugging) also fail to probe: > > > [ 0.839533] cros-ec-spi spi6.0: EC failed to respond in time > > > [ 1.040453] cros-ec-spi spi6.0: EC failed to respond in time > > > [ 1.040852] cros-ec-spi spi6.0: Cannot identify the EC: error -110 > > > [ 1.040855] cros-ec-spi spi6.0: cannot register EC, fallback to spidev > > > [ 1.040942] cros-ec-spi: probe of spi6.0 failed with error -110 > > > > > > I wasn't closely looking at this part closely when I was using my > > > other spi port with spidev, so this is why I haven't noticed it > > > before. > > > Doug suggests this might be a polarity issue. More scoping to be had. > > > > > > > Ah I see. It looks like the cs-gpios polarity is wrong for the DTS on > > sc7180. That's a patch that Doug has sent in for the qcom tree, commit > > 37dd4b777942 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to use > > GPIO for CS") and it is pending for the next release (v5.11). Doug says > > he will send in a fix for the DTS side, but this patch is still "good" > > as far as I can tell. It moves us to use gpio descriptors and also finds > > bugs like this in the DTS file that we would have missed otherwise > > because the legacy mode doesn't look at the polarity flags in DT. > > And that is wrong. With even more investigation and Doug's eagle eyes it > seems that the cros-ec driver is overriding the spi::mode to clear out > the SPI_CS_HIGH bit that the spi core sets in there when using the gpio > descriptors. I'll send a patch for cros-ec-spi shortly. So do we need any coordinating here, are we OK w/ trogdor devices being broken for a short period of time? I think the device tree changes switching to use GPIO for chip select is already queued in linux-next. That means if we land this patch before the fix to cros_ec [1] then we'll end up in a broken state. Would we be able to do some quick landing to get the cros-ec fix into v5.10 and then target the SPI patch for 5.11? -Doug [1] https://lore.kernel.org/r/20201203011649.1405292-2-swboyd@chromium.org/