From: Doug Anderson <dianders@chromium.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
"Ravi Kumar Bokka (Temp)" <rbokka@codeaurora.org>
Subject: Re: [PATCH v3 2/4] nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering
Date: Fri, 30 Jul 2021 06:49:10 -0700 [thread overview]
Message-ID: <CAD=FV=X9wzRu20xydjt3c6682rWocd6dik6qRc9N1t_Dq97ODw@mail.gmail.com> (raw)
In-Reply-To: <1627627573-32454-3-git-send-email-rnayak@codeaurora.org>
Hi,
On Thu, Jul 29, 2021 at 11:46 PM Rajendra Nayak <rnayak@codeaurora.org> wrote:
>
> qfprom_disable_fuse_blowing() disables a bunch of resources,
> and then does a few register writes in the 'conf' address
> space.
> It works perhaps because the resources are needed only for the
> 'raw' register space writes, and that the 'conf' space allows
> read/writes regardless.
> However that makes the code look confusing, so just move the
> register writes before turning off the resources in the
> function.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
> drivers/nvmem/qfprom.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c
> index 81fbad5..b0ca4c6 100644
> --- a/drivers/nvmem/qfprom.c
> +++ b/drivers/nvmem/qfprom.c
> @@ -139,6 +139,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
> {
> int ret;
>
> + writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
> + writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
> +
> /*
> * This may be a shared rail and may be able to run at a lower rate
> * when we're not blowing fuses. At the moment, the regulator framework
> @@ -159,9 +162,6 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
> "Failed to set clock rate for disable (ignoring)\n");
>
> clk_disable_unprepare(priv->secclk);
> -
> - writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
> - writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
> }
I think it doesn't matter since all of these resources are just needed
for burning fuses, but I agree that what you have here makes more
logical sense and makes the function less confusing.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
next prev parent reply other threads:[~2021-07-30 13:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-30 6:46 [PATCH v3 0/4] nvmem: qfprom: Add binding updates and power-domain handling Rajendra Nayak
2021-07-30 6:46 ` [PATCH v3 1/4] dt-bindings: nvmem: qfprom: Add optional power-domains property Rajendra Nayak
2021-08-03 19:38 ` Rob Herring
2021-07-30 6:46 ` [PATCH v3 2/4] nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering Rajendra Nayak
2021-07-30 13:49 ` Doug Anderson [this message]
2021-07-30 6:46 ` [PATCH v3 3/4] nvmem: qfprom: sc7280: Handle the additional power-domains vote Rajendra Nayak
2021-07-30 6:46 ` [PATCH v3 4/4] arm64: dts: qcom: sc7280: Add qfprom node Rajendra Nayak
2021-08-04 8:29 ` [PATCH v3 0/4] nvmem: qfprom: Add binding updates and power-domain handling Srinivas Kandagatla
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