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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Maxime, On Mon, 5 Oct 2020 at 11:21, Maxime Ripard wrote: > > Hi Cl=C3=A9ment, > > On Sat, Oct 03, 2020 at 11:20:01AM +0200, Cl=C3=A9ment P=C3=A9ron wrote: > > Sunxi MMC driver can't distinguish at runtime what's the I/O voltage > > for HS200 mode. > > Unfortunately, that's not true (or at least, that's not related to your p= atch). > > > Add a property in the device-tree to notify MMC core about this > > configuration. > > > > Fixes: 089bee8dd119 ("arm64: dts: allwinner: h6: Introduce Beelink GS1 = board") > > Signed-off-by: Cl=C3=A9ment P=C3=A9ron > > --- > > arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/= arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > index 049c21718846..3f20d2c9bbbb 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > @@ -145,6 +145,7 @@ &mmc2 { > > vqmmc-supply =3D <®_bldo2>; > > non-removable; > > cap-mmc-hw-reset; > > + mmc-hs200-1_8v; > > bus-width =3D <8>; > > status =3D "okay"; > > }; > > I'm not really sure what you're trying to fix here, but as far as MMC > goes, eMMC's can support io voltage of 3.3, 1.8 and 1.2V. Modes up until > HS DDR (50MHz in DDR) will use an IO voltage of 3.3V, higher speed modes > (HS200 and HS400) supporting 1.8V and 1.2V. Some users report that the eMMC is not working properly on their Beelink GS1 boards. > > The mmc-hs200-1_8v property states that the MMC controller supports the > HS200 mode at 1.8V. Now, I can only assume that since BLDO2 is set up at > 1.8V then otherwise, the MMC core will rightfully decide to use the > highest supported mode. In this case, since the driver sets it, it would > be HS-DDR at 3.3V, which won't work with that fixed regulator. > > I can only assume that enabling HS200 at 1.8V only fixes the issue you > have because otherwise it would use HS-DDR at 3.3V, ie not actually > fixing the issue but sweeping it under the rug. > > Trying to add mmc-ddr-1_8v would be a good idea Thanks for the explanation, this is indeed the correct one. So It looks like the SDIO controller has an issue on some boards when using HS-DDR mode. Is this patch acceptable with the proper commit log? It looks like the same issue is happening on A64 Pinebook board. Thanks Clement > > Maxime