From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Siddhesh Poyarekar <siddhesh@gotplt.org>
Cc: Mikulas Patocka <mpatocka@redhat.com>,
Florian Weimer <fweimer@redhat.com>,
Andrew Pinski <pinskia@gmail.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Ramana Radhakrishnan <ramana.gcc@googlemail.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
GNU C Library <libc-alpha@sourceware.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Russell King <linux@armlinux.org.uk>,
LKML <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
Subject: Re: framebuffer corruption due to overlapping stp instructions on arm64
Date: Mon, 6 Aug 2018 13:29:00 +0200 [thread overview]
Message-ID: <CAKv+Gu_Qo+VJMBg0WxzR49oqTv+8nw-1Z+uOOeFV0cduCO8a_A@mail.gmail.com> (raw)
In-Reply-To: <df77857e-1674-38ea-2337-366182afb41e@gotplt.org>
On 6 August 2018 at 13:19, Siddhesh Poyarekar <siddhesh@gotplt.org> wrote:
> On 08/06/2018 04:01 PM, Mikulas Patocka wrote:
>>
>> I think there are three possible solutions:
>>
>> 1. provide an alternative memcpy implementation that doesn't do unaligned
>> accesses and recompile the graphics software with -mstrict-align
>
>
> Given that there's already a tunable glibc.cpu.cached_memopt for powerpc
> that (as Tulio clarified elsewhere) essentially does the same thing for
> cache-inhibited memory, it wouldn't be too much of an overhead to put in
> another ifunc implementation that gets chosen only when one sets this
> tunable. In fact, we could reuse the C string routines for this to avoid
> adding yet another assembly implementation to have to support. That way we
> can minimally fix the issue at hand without regressing existing uses.
>
> You can then set the glibc.cpu.cached_memopt tunable in the default
> environment for your board[1] or for applications that need it (e.g.
> whenever DISPLAY is exported or something like that).
>
> The only difference from Power would be that cpu.noncached==0 for Power by
> default whereas for aarch64 it will be the other way around. It shouldn't
> be too hard to enhance the framework to set platform-specific defaults.
>
Thanks Siddhesh,
But we don't need another memcpy(). We need outbound PCIe windows that
tolerate being mapped as normal non-cacheable memory.
And if this is fundamentally impossible, can someone please try
explaining it again? (apologies for being thick)
next prev parent reply other threads:[~2018-08-06 11:29 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-02 19:31 framebuffer corruption due to overlapping stp instructions on arm64 Mikulas Patocka
[not found] ` <CAHCPf3tFGqkYEcWNN4LaWThw_rVqT316pzLv6T7RfxwO-eZ0EA@mail.gmail.com>
2018-08-03 6:35 ` Mikulas Patocka
2018-08-03 7:16 ` Ard Biesheuvel
2018-08-03 9:41 ` Will Deacon
2018-08-03 17:09 ` Mikulas Patocka
2018-08-03 17:32 ` Sinan Kaya
2018-08-03 17:33 ` Ard Biesheuvel
2018-08-03 18:25 ` Mikulas Patocka
2018-08-03 20:44 ` Matt Sealey
2018-08-03 21:20 ` Ard Biesheuvel
2018-08-06 10:25 ` Mikulas Patocka
2018-08-06 12:42 ` Robin Murphy
2018-08-06 12:53 ` Ard Biesheuvel
2018-08-06 13:41 ` Marcin Wojtas
2018-08-06 13:48 ` Ard Biesheuvel
2018-08-06 14:07 ` Marcin Wojtas
2018-08-06 14:13 ` Mikulas Patocka
2018-08-06 15:47 ` Ard Biesheuvel
2018-08-06 17:09 ` Mikulas Patocka
2018-08-06 17:21 ` Ard Biesheuvel
2018-08-06 19:54 ` Mikulas Patocka
2018-08-06 20:11 ` Ard Biesheuvel
2018-08-06 20:31 ` Mikulas Patocka
2018-08-07 16:40 ` Marcin Wojtas
2018-08-07 17:39 ` Mikulas Patocka
2018-08-07 18:07 ` Ard Biesheuvel
2018-08-07 18:17 ` Mikulas Patocka
[not found] ` <CAPv3WKcKoEe=Qysp6Oac2C=G9bUhUQf1twSRCY+_qJ6XEC-iag@mail.gmail.com>
2018-08-08 14:10 ` Mikulas Patocka
2018-08-06 17:13 ` Catalin Marinas
2018-08-06 17:19 ` Mikulas Patocka
2018-08-08 18:31 ` Mikulas Patocka
2018-08-04 13:29 ` Mikulas Patocka
2018-08-08 12:16 ` Catalin Marinas
2018-08-08 13:02 ` David Laight
2018-08-08 13:46 ` Mikulas Patocka
2018-08-08 14:26 ` David Laight
2018-08-08 14:50 ` Catalin Marinas
2018-08-08 16:21 ` Mikulas Patocka
2018-08-08 16:31 ` Arnd Bergmann
2018-08-08 16:43 ` David Laight
2018-08-08 18:56 ` Mikulas Patocka
2018-08-08 18:37 ` Mikulas Patocka
2018-08-08 11:39 ` Catalin Marinas
2018-08-08 14:12 ` Mikulas Patocka
2018-08-08 14:28 ` Catalin Marinas
2018-08-08 18:40 ` Mikulas Patocka
2018-08-08 15:01 ` Richard Earnshaw (lists)
2018-08-08 15:14 ` Catalin Marinas
2018-08-08 16:01 ` Arnd Bergmann
2018-08-08 18:25 ` Mikulas Patocka
2018-08-08 21:51 ` Arnd Bergmann
2018-08-09 15:29 ` Arnd Bergmann
2018-08-03 7:11 ` Andrew Pinski
2018-08-03 7:53 ` Florian Weimer
2018-08-03 9:12 ` Szabolcs Nagy
2018-08-03 9:15 ` Ramana Radhakrishnan
2018-08-03 9:29 ` Ard Biesheuvel
2018-08-03 9:37 ` Ramana Radhakrishnan
2018-08-03 9:42 ` Richard Earnshaw (lists)
2018-08-04 0:58 ` Mikulas Patocka
2018-08-04 1:13 ` Andrew Pinski
2018-08-04 11:04 ` Mikulas Patocka
2018-08-05 18:33 ` Florian Weimer
2018-08-06 8:02 ` Mikulas Patocka
2018-08-06 8:10 ` Ard Biesheuvel
2018-08-06 10:31 ` Mikulas Patocka
2018-08-06 10:37 ` Ard Biesheuvel
2018-08-06 10:42 ` Mikulas Patocka
2018-08-06 10:48 ` Ard Biesheuvel
2018-08-06 12:09 ` Mikulas Patocka
2018-08-06 12:19 ` Ard Biesheuvel
2018-08-06 12:22 ` Ard Biesheuvel
2018-08-07 14:14 ` Mikulas Patocka
2018-08-07 14:40 ` Ard Biesheuvel
2018-08-08 19:15 ` Mikulas Patocka
2018-08-06 11:19 ` Siddhesh Poyarekar
2018-08-06 11:29 ` Ard Biesheuvel [this message]
2018-08-06 14:26 ` Tulio Magno Quites Machado Filho
2018-08-05 21:51 ` Pavel Machek
2018-08-06 14:30 ` Mikulas Patocka
2018-08-03 11:24 ` David Laight
2018-08-03 12:04 ` Mikulas Patocka
2018-08-03 13:04 ` David Laight
2018-08-05 14:36 ` Mikulas Patocka
2018-08-06 10:18 ` David Laight
2018-08-07 14:07 ` Mikulas Patocka
2018-08-07 14:33 ` David Laight
2018-08-08 14:21 ` Mikulas Patocka
2018-08-03 13:20 ` Mikulas Patocka
2018-08-03 13:31 ` Mikulas Patocka
2018-08-03 14:17 ` Richard Earnshaw (lists)
2018-08-05 21:36 ` Pavel Machek
2018-08-06 8:04 ` Ramana Radhakrishnan
2018-08-06 8:44 ` Pavel Machek
2018-08-06 9:11 ` Ard Biesheuvel
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