From: Loic Poulain <loic.poulain@linaro.org>
To: Bhaumik Bhatt <bbhatt@codeaurora.org>
Cc: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
"Hemant Kumar" <hemantk@codeaurora.org>,
"Jeffrey Hugo" <jhugo@codeaurora.org>,
"open list" <linux-kernel@vger.kernel.org>,
"Carl Yin(殷张成)" <carl.yin@quectel.com>,
"Naveen Kumar" <naveen.kumar@quectel.com>
Subject: Re: [PATCH v3 1/3] bus: mhi: core: Introduce internal register poll helper function
Date: Fri, 5 Mar 2021 14:37:51 +0100 [thread overview]
Message-ID: <CAMZdPi9Kg7_tcu1WQMQHzmNQLyBnH4TeJf6Rbq73Q=Ur7RDsqA@mail.gmail.com> (raw)
In-Reply-To: <1614138270-2374-2-git-send-email-bbhatt@codeaurora.org>
On Wed, 24 Feb 2021 at 04:44, Bhaumik Bhatt <bbhatt@codeaurora.org> wrote:
>
> Introduce helper function to allow MHI core driver to poll for
> a value in a register field. This helps reach a common path to
> read and poll register values along with a retry time interval.
>
> Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
> ---
> drivers/bus/mhi/core/internal.h | 3 +++
> drivers/bus/mhi/core/main.c | 23 +++++++++++++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h
> index 6f80ec3..005286b 100644
> --- a/drivers/bus/mhi/core/internal.h
> +++ b/drivers/bus/mhi/core/internal.h
> @@ -643,6 +643,9 @@ int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl,
> int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
> void __iomem *base, u32 offset, u32 mask,
> u32 shift, u32 *out);
> +int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl,
> + void __iomem *base, u32 offset, u32 mask,
> + u32 shift, u32 val, u32 delayus);
> void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
> u32 offset, u32 val);
> void mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base,
> diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
> index 4e0131b..249ae26 100644
> --- a/drivers/bus/mhi/core/main.c
> +++ b/drivers/bus/mhi/core/main.c
> @@ -4,6 +4,7 @@
> *
> */
>
> +#include <linux/delay.h>
> #include <linux/device.h>
> #include <linux/dma-direction.h>
> #include <linux/dma-mapping.h>
> @@ -37,6 +38,28 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
> return 0;
> }
>
> +int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl,
> + void __iomem *base, u32 offset,
> + u32 mask, u32 shift, u32 val, u32 delayus)
> +{
> + int ret = -ENOENT;
> + u32 out, retry = (mhi_cntrl->timeout_ms * 1000) / delayus;
Can we get the timeout from parameter, not sure all callers will want
to wait the controller timeout_ms in the future. In case of PCI the
mhi_cntrl->timeout_ms can be really huge given the device can take up
to 15 seconds to completely start.
> +
> + while (retry--) {
> + ret = mhi_read_reg_field(mhi_cntrl, base, offset, mask, shift,
> + &out);
> + if (ret)
> + return -EIO;
> +
> + if (out == val)
> + return 0;
> +
> + udelay(delayus);
I would use a sleep variant (msleep) and millisecond parameter for the function.
Regards,
Loic
next prev parent reply other threads:[~2021-03-05 13:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-24 3:44 [PATCH v3 0/3] Polling for MHI ready Bhaumik Bhatt
2021-02-24 3:44 ` [PATCH v3 1/3] bus: mhi: core: Introduce internal register poll helper function Bhaumik Bhatt
2021-03-05 13:37 ` Loic Poulain [this message]
2021-03-10 18:57 ` Jeffrey Hugo
2021-03-10 22:56 ` Bhaumik Bhatt
2021-02-24 3:44 ` [PATCH v3 2/3] bus: mhi: core: Move to polling method to wait for MHI ready Bhaumik Bhatt
2021-03-10 19:02 ` Jeffrey Hugo
2021-03-10 22:58 ` Bhaumik Bhatt
2021-02-24 3:44 ` [PATCH v3 3/3] bus: mhi: core: Use poll register read API for RDDM download Bhaumik Bhatt
2021-03-10 19:04 ` Jeffrey Hugo
2021-02-24 9:27 ` [PATCH v3 0/3] Polling for MHI ready Manivannan Sadhasivam
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