From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Adam Ford <aford173@gmail.com>
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
aford@beaconembedded.com, charles.stevens@logicpd.com,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Marek Vasut <marek.vasut+renesas@gmail.com>
Subject: Re: [RFC] clk: vc5: Add bindings for output configurations
Date: Fri, 27 Mar 2020 10:41:24 +0100 [thread overview]
Message-ID: <CAMuHMdU9tQwQHkX0MdQLkMfz-2ymDzfNTFGnzPoq=JQF+28HOg@mail.gmail.com> (raw)
In-Reply-To: <20200326213251.54457-1-aford173@gmail.com>
Hi Adam,
CC Marek
On Thu, Mar 26, 2020 at 10:33 PM Adam Ford <aford173@gmail.com> wrote:
> The Versaclock can be purchased in a non-programmed configuration.
> If that is the case, the driver needs to configure the chip to
> output the correct signal type, voltage and slew.
>
> This RFC is proposing an additional binding to allow non-programmed
> chips to be configured beyond their default configuration.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
> diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
> index 05a245c9df08..4bc46ed9ba4a 100644
> --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
> +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
> @@ -30,6 +30,25 @@ Required properties:
> - 5p49v5933 and
> - 5p49v5935: (optional) property not present or "clkin".
>
> +For all output ports, an option child node can be used to specify:
> +
> +- mode: can be one of
> + - LVPECL: Low-voltage positive/psuedo emitter-coupled logic
> + - CMOS
> + - HCSL
> + - LVDS: Low voltage differential signal
> +
> +- voltage-level: can be one of the following microvolts
> + - 1800000
> + - 2500000
> + - 3300000
> +- slew: Percent of normal, can be one of
> + - P80
> + - P85
> + - P90
> + - P100
Why the P prefixes? Can't you just use integer values?
After the conversion to json-schema, these values can be validated, too.
> +
> +
> ==Mapping between clock specifier and physical pins==
>
> When referencing the provided clock in the DT using phandle and
> @@ -62,6 +81,8 @@ clock specifier, the following mapping applies:
>
> ==Example==
>
> +#include <dt-bindings/versaclock.h>
Does not exist?
> +
> /* 25MHz reference crystal */
> ref25: ref25m {
> compatible = "fixed-clock";
> @@ -80,6 +101,13 @@ i2c-master-node {
> /* Connect XIN input to 25MHz reference */
> clocks = <&ref25m>;
> clock-names = "xin";
> +
> + ports@1 {
> + reg = <1>;
> + mode = <CMOS>;
> + pwr_sel = <1800000>;
> + slew = <P80>;
> + };
> };
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2020-03-27 9:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 21:32 [RFC] clk: vc5: Add bindings for output configurations Adam Ford
2020-03-27 9:41 ` Geert Uytterhoeven [this message]
2020-03-27 10:05 ` Adam Ford
2020-04-01 14:51 ` Adam Ford
2020-04-05 1:28 ` Rob Herring
2020-04-05 1:38 ` Adam Ford
2020-04-06 16:12 ` Rob Herring
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