Re: [PATCH v6 2/2] serial:sunplus-uart:Add Sunplus SoC UART Driver

From: hammer hsieh <hammerh0314@gmail.com>
To: Jiri Slaby <jirislaby@kernel.org>
Cc: Greg KH <gregkh@linuxfoundation.org>,
	robh+dt@kernel.org, linux-serial@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	p.zabel@pengutronix.de, wells.lu@sunplus.com,
	"hammer.hsieh" <hammer.hsieh@sunplus.com>
Subject: Re: [PATCH v6 2/2] serial:sunplus-uart:Add Sunplus SoC UART Driver
Date: Thu, 13 Jan 2022 18:56:44 +0800	[thread overview]
Message-ID: <CAOX-t57KZb0hNDuhPsabkmkf_qOOLqyH3yuvkHP6UNwhLodWDg@mail.gmail.com> (raw)
In-Reply-To: <d6d3aa07-7bf1-2b6d-356f-ae13c7b9d6cd@kernel.org>

Jiri Slaby <jirislaby@kernel.org> 於 2022年1月13日 週四 下午5:08寫道：
>
> On 13. 01. 22, 9:54, hammer hsieh wrote:
> >>> +static void sunplus_shutdown(struct uart_port *port)
> >>> +{
> >>> +     unsigned long flags;
> >>> +
> >>> +     spin_lock_irqsave(&port->lock, flags);
> >>> +     writel(0, port->membase + SUP_UART_ISC);
> >>> +     spin_unlock_irqrestore(&port->lock, flags);
> >>
> >> I asked last time:
> >> * What bus is this -- posting?
> >>
> >> You replied:
> >> * Here just clear interrupt.
> >> * Not really understand your comment?
> >>
> >> So I am asking again:
> >> What bus is this? Isn't a posted write a problem here? I mean, shouldn't
> >> you read from the register so that the write hits the device? That
> >> depends on the bus this sits on, so just asking.
> >>
> >
> > Each UART has its own ISC register.
> > Ex.
> > dev/ttySUP0 base_adr = 0x9C00-0000 , isc_addr = 0x9C00-001C
> > dev/ttySUP1 base_adr = 0x9C00-0080 , isc_addr = 0x9C00-009C
> > dev/ttySUP2 base_adr = 0x9C00-0100 , isc_addr = 0x9C00-011C
> > dev/ttySUP3 base_adr = 0x9C00-0180 , isc_addr = 0x9C00-019C
> > dev/ttySUP4 base_adr = 0x9C00-0200 , isc_addr = 0x9C00-021C
> > So sunplus_shutdown() just simply turn off its own device isc only.
> > That's why I didn't read register value, just write 0 for it.
>
> Could you explain me what posted write is and how does it not matter in
> this case?
>

Each UART ISC register contains

Bit7 MSM(Modem Status) INT enable / disable (Access type RW) not use
now (0: default)
Bit6 LSM(Line Status) INT  enable / disable  (Access type RW) not use
now(0: default)
Bit5 RXM INT enable / disable  (Access type RW) set this
Bit4 TXM INT enable / disable  (Access type RW) set this

Bit3 MS(Modem Status) INT flag (Access type Read only) not use now (0: default)
Bit2 LS(Line Status) INT flag (Access type Read only) not use now (0: default)
Bit1 RX INT flag (Access type Read only) read this
Bit0 TX INT flag (Access type Read only) read this

sunplus_shutdown()
main purpose is to turn off TX INT(bit4) and RX INT(bit5)
bit7 and bit6 not used, should be 0.
bit3 ~ bit0 read only, no effect while writing 0 to them.

> thanks,
> --
> js
> suse labs