RE: SMP spin-locks

From: "David Schwartz" <davids@webmaster.com>
To: <root@chaos.analogic.com>, "Roger Larsson" <roger.larsson@norran.net>
Cc: "Linux kernel" <linux-kernel@vger.kernel.org>
Subject: RE: SMP spin-locks
Date: Fri, 15 Jun 2001 03:35:21 -0700	[thread overview]
Message-ID: <NCBBLIEPOCNJOAEKBEAKGEDMPOAA.davids@webmaster.com> (raw)
In-Reply-To: <Pine.LNX.3.95.1010614223154.20486A-100000@chaos.analogic.com>


> Spinlocks are machine dependent. A simple increment of a byte
> memory variable, spinning if it's not 1 will do fine. Decrementing
> this variable will release the lock. A `lock` prefix is not necessary
                                       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> because  all Intel byte operations are atomic anyway. This assumes
                          ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> that the lock was initialized to 0. It doesn't have to be. It
> could be initialized to 0xaa (anything) and spin if it's not
> 0xab (or anything + 1).

	If this is true, atomicity isn't enough to do it. Atomicity means that
there's a single instruction (and so it can't be interrupted mid-modify).
Atomicity (at least as the term is normally used) doesn't prevent the
cache-coherency logic from ping-ponging the memory location between two
processor's caches during the atomic operation.

	DS