From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F5A5C43216 for ; Thu, 5 Aug 2021 17:20:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 60C7860F22 for ; Thu, 5 Aug 2021 17:20:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239471AbhHERUj (ORCPT ); Thu, 5 Aug 2021 13:20:39 -0400 Received: from mail-0201.mail-europe.com ([51.77.79.158]:53776 "EHLO mail-0201.mail-europe.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230107AbhHERUi (ORCPT ); Thu, 5 Aug 2021 13:20:38 -0400 Date: Thu, 05 Aug 2021 17:19:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail; t=1628183990; bh=Q0e3u15i1PAFg63iMP+b35YREVf5I1jWy7jkFOGimb8=; h=Date:To:From:Cc:Reply-To:Subject:From; b=ru/jpoHZaF0+zqT+SS4ttIG34OcfeGCHPEWs0dKerxQXDLOfUuaI2hp0WozBGeJKv dNzBf9gsqozxYPNyykBCvGQ3xPNikduz2Tcj2NY7X/6eiat+/pXlVpdkUSHnL9IFmd wyrbLFJ0ejNonKCSS5y0XE/A6i7/iKV3KstOVdMY= To: bjorn.andersson@linaro.org, sboyd@kernel.org From: Sireesh Kodali Cc: agross@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vladimir Lypak , Adam Skladowski , Konrad Dybcio , Sireesh Kodali Reply-To: Sireesh Kodali Subject: [PATCH 2/2] clk: qcom: rpmcc: Add support for MSM8953 RPM clocks. Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vladimir Lypak Add definitions for RPM clocks used on MSM8953 platform. Signed-off-by: Vladimir Lypak Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio Signed-off-by: Sireesh Kodali --- drivers/clk/qcom/clk-smd-rpm.c | 37 ++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.= c index 800b2fef1887..e99131016911 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -913,10 +913,47 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = =3D { =09.num_clks =3D ARRAY_SIZE(sdm660_clks), }; =20 +static struct clk_smd_rpm *msm8953_clks[] =3D { +=09[RPM_SMD_XO_CLK_SRC]=09=09=3D &sdm660_bi_tcxo, +=09[RPM_SMD_XO_A_CLK_SRC]=09=09=3D &sdm660_bi_tcxo_a, +=09[RPM_SMD_PCNOC_CLK]=09=09=3D &msm8916_pcnoc_clk, +=09[RPM_SMD_PCNOC_A_CLK]=09=09=3D &msm8916_pcnoc_a_clk, +=09[RPM_SMD_SNOC_CLK]=09=09=3D &msm8916_snoc_clk, +=09[RPM_SMD_SNOC_A_CLK]=09=09=3D &msm8916_snoc_a_clk, +=09[RPM_SMD_BIMC_CLK]=09=09=3D &msm8916_bimc_clk, +=09[RPM_SMD_BIMC_A_CLK]=09=09=3D &msm8916_bimc_a_clk, +=09[RPM_SMD_IPA_CLK]=09=09=3D &msm8976_ipa_clk, +=09[RPM_SMD_IPA_A_CLK]=09=09=3D &msm8976_ipa_a_clk, +=09[RPM_SMD_SYSMMNOC_CLK]=09=09=3D &msm8936_sysmmnoc_clk, +=09[RPM_SMD_SYSMMNOC_A_CLK]=09=3D &msm8936_sysmmnoc_a_clk, +=09[RPM_SMD_QDSS_CLK]=09=09=3D &msm8916_qdss_clk, +=09[RPM_SMD_QDSS_A_CLK]=09=09=3D &msm8916_qdss_a_clk, +=09[RPM_SMD_BB_CLK1]=09=09=3D &msm8916_bb_clk1, +=09[RPM_SMD_BB_CLK1_A]=09=09=3D &msm8916_bb_clk1_a, +=09[RPM_SMD_BB_CLK2]=09=09=3D &msm8916_bb_clk2, +=09[RPM_SMD_BB_CLK2_A]=09=09=3D &msm8916_bb_clk2_a, +=09[RPM_SMD_RF_CLK2]=09=09=3D &msm8916_rf_clk2, +=09[RPM_SMD_RF_CLK2_A]=09=09=3D &msm8916_rf_clk2_a, +=09[RPM_SMD_RF_CLK3]=09=09=3D &msm8992_ln_bb_clk, +=09[RPM_SMD_RF_CLK3_A]=09=09=3D &msm8992_ln_bb_a_clk, +=09[RPM_SMD_DIV_CLK2]=09=09=3D &msm8974_div_clk2, +=09[RPM_SMD_DIV_A_CLK2]=09=09=3D &msm8974_div_a_clk2, +=09[RPM_SMD_BB_CLK1_PIN]=09=09=3D &msm8916_bb_clk1_pin, +=09[RPM_SMD_BB_CLK1_A_PIN]=09=09=3D &msm8916_bb_clk1_a_pin, +=09[RPM_SMD_BB_CLK2_PIN]=09=09=3D &msm8916_bb_clk2_pin, +=09[RPM_SMD_BB_CLK2_A_PIN]=09=09=3D &msm8916_bb_clk2_a_pin, +}; + +static const struct rpm_smd_clk_desc rpm_clk_msm8953 =3D { +=09.clks =3D msm8953_clks, +=09.num_clks =3D ARRAY_SIZE(msm8953_clks), +}; + static const struct of_device_id rpm_smd_clk_match_table[] =3D { =09{ .compatible =3D "qcom,rpmcc-msm8226", .data =3D &rpm_clk_msm8974 }, =09{ .compatible =3D "qcom,rpmcc-msm8916", .data =3D &rpm_clk_msm8916 }, =09{ .compatible =3D "qcom,rpmcc-msm8936", .data =3D &rpm_clk_msm8936 }, +=09{ .compatible =3D "qcom,rpmcc-msm8953", .data =3D &rpm_clk_msm8953 }, =09{ .compatible =3D "qcom,rpmcc-msm8974", .data =3D &rpm_clk_msm8974 }, =09{ .compatible =3D "qcom,rpmcc-msm8976", .data =3D &rpm_clk_msm8976 }, =09{ .compatible =3D "qcom,rpmcc-msm8992", .data =3D &rpm_clk_msm8992 }, --=20 2.32.0