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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: kholk11@gmail.com
Cc: agross@kernel.org, sboyd@kernel.org, marijns95@gmail.com,
	konradybcio@gmail.com, martin.botka1@gmail.com,
	linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/5] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings
Date: Fri, 4 Dec 2020 23:14:41 -0600	[thread overview]
Message-ID: <X8sXQZHsYl8qUTbc@builder.lan> (raw)
In-Reply-To: <20200926130306.13843-6-kholk11@gmail.com>

On Sat 26 Sep 08:03 CDT 2020, kholk11@gmail.com wrote:

> From: AngeloGioacchino Del Regno <kholk11@gmail.com>
> 
> Add device tree bindings for graphics clock controller for
> Qualcomm Technology Inc's SDM630 and SDM660 SoCs.
> ---
>  .../bindings/clock/qcom,sdm660-gpucc.yaml     | 75 +++++++++++++++++++
>  1 file changed, 75 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml
> new file mode 100644
> index 000000000000..dbb14b274d5b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sdm660-gpucc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Graphics Clock & Reset Controller Binding for SDM630 and SDM660
> +
> +maintainers:
> +  - Taniya Das <tdas@codeaurora.org>
> +
> +description: |
> +  Qualcomm graphics clock control module which supports the clocks, resets and
> +  power domains on SDM630 and SDM660.
> +
> +  See also dt-bindings/clock/qcom,gpucc-sdm660.h.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sdm630-gpucc
> +      - qcom,sdm660-gpucc
> +
> +  clocks:
> +    items:
> +      - description: Board XO source
> +      - description: GPLL0 main gpu branch
> +      - description: GPLL0 divider gpu branch
> +
> +  clock-names:
> +    items:
> +      - const: xo
> +      - const: gcc_gpu_gpll0_clk
> +      - const: gcc_gpu_gpll0_div_clk
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  '#power-domain-cells':
> +    const: 1
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - '#clock-cells'
> +  - '#reset-cells'
> +  - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,gcc-sdm660.h>
> +    #include <dt-bindings/clock/qcom,rpmcc.h>
> +
> +    clock-controller@5065000 {
> +      compatible = "qcom,sdm660-gpucc";
> +      #clock-cells = <1>;
> +      #reset-cells = <1>;
> +      #power-domain-cells = <1>;
> +      reg = <0x05065000 0x9038>;
> +      clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
> +               <&gcc GCC_GPU_GPLL0_CLK>,
> +               <&gcc GCC_GPU_GPLL0_DIV_CLK>;
> +      clock-names = "xo", "gpll0";

You need 3 clock-names, and they need to match what the binding defines.

Other than that I think it looks good.

Regards,
Bjorn

> +    };
> +...
> -- 
> 2.28.0
> 

  parent reply	other threads:[~2020-12-05  5:15 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-26 13:03 [PATCH 0/5] SDM630/660 Multimedia and GPU clock controllers kholk11
2020-09-26 13:03 ` [PATCH 1/5] clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver kholk11
2020-09-26 13:23   ` Martin Botka
2020-09-30 20:47   ` kernel test robot
2020-10-13 14:51     ` Martin Botka
2020-10-13 15:01       ` Martin Botka
2020-12-05  4:59   ` Bjorn Andersson
2020-09-26 13:03 ` [PATCH 2/5] dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc kholk11
2020-09-26 13:03 ` [PATCH 3/5] clk: qcom: mmcc-sdm660: Add MDP clock source CXC to MDSS GDSC kholk11
2020-12-05  5:08   ` Bjorn Andersson
2021-01-09 18:39     ` AngeloGioacchino Del Regno
2020-09-26 13:03 ` [PATCH 4/5] clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver kholk11
2020-09-26 13:29   ` Martin Botka
2020-09-30 20:46   ` kernel test robot
2020-09-30 21:58     ` AngeloGioacchino Del Regno
2020-10-02  5:39       ` Philip Li
2020-12-05  5:16   ` Bjorn Andersson
2020-09-26 13:03 ` [PATCH 5/5] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings kholk11
2020-09-26 13:30   ` Martin Botka
2020-12-05  5:14   ` Bjorn Andersson [this message]
2020-12-04 18:16 ` [PATCH 0/5] SDM630/660 Multimedia and GPU clock controllers AngeloGioacchino Del Regno

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