From: Juergen Gross <jgross@suse.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: the arch/x86 maintainers <x86@kernel.org>,
tglx@linutronix.de, xen-devel <xen-devel@lists.xenproject.org>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
mingo@redhat.com, linux-kernel@vger.kernel.org, hpa@zytor.com
Subject: Re: [Xen-devel] [PATCH 2/2] x86/pae: use 64 bit atomic xchg function in native_ptep_get_and_clear
Date: Mon, 20 Aug 2018 10:56:12 +0200 [thread overview]
Message-ID: <a85dcc1f-4245-3c07-8d47-53b6c9ce12f9@suse.com> (raw)
In-Reply-To: <5B7A7E6C02000078001DFD15@prv1-mh.provo.novell.com>
On 20/08/18 10:40, Jan Beulich wrote:
>>>> On 20.08.18 at 07:14, <jgross@suse.com> wrote:
>> @@ -148,14 +150,14 @@ static inline void pud_clear(pud_t *pudp)
>> #ifdef CONFIG_SMP
>> static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
>> {
>> - pte_t res;
>> + union {
>> + pte_t pte;
>> + long long val;
>> + } res;
>
> Why the union? pte_t already is one, with the pte field being what
> you're after ...
>
>> - /* xchg acts as a barrier before the setting of the high bits */
>> - res.pte_low = xchg(&ptep->pte_low, 0);
>> - res.pte_high = ptep->pte_high;
>> - ptep->pte_high = 0;
>> + res.val = arch_atomic64_xchg((atomic64_t *)ptep, 0);
>
> ... here.
Uuh, yes.
I'm waiting for more comments, especially regarding the potential need
for a paravirt function.
Juergen
next prev parent reply other threads:[~2018-08-20 8:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-20 5:14 [PATCH 0/2] x86/xen: avoid 32-bit writes to PTEs in PV PAE guests Juergen Gross
2018-08-20 5:14 ` [PATCH 1/2] x86/xen: don't write ptes directly in 32-bit PV guests Juergen Gross
2018-08-20 8:38 ` [Xen-devel] " Jan Beulich
2018-08-20 5:14 ` [PATCH 2/2] x86/pae: use 64 bit atomic xchg function in native_ptep_get_and_clear Juergen Gross
2018-08-20 8:40 ` [Xen-devel] " Jan Beulich
2018-08-20 8:56 ` Juergen Gross [this message]
2018-08-20 13:26 ` Thomas Gleixner
2018-08-20 14:55 ` Juergen Gross
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