From: "Luck, Tony" <tony.luck@intel.com>
To: "Schofield, Alison" <alison.schofield@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>, Borislav Petkov <bp@alien8.de>
Cc: "x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Tim Chen <tim.c.chen@linux.intel.com>,
"H. Peter Anvin" <hpa@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
David Rientjes <rientjes@google.com>,
Igor Mammedov <imammedo@redhat.com>,
Prarit Bhargava <prarit@redhat.com>,
"brice.goglin@gmail.com" <brice.goglin@gmail.com>
Subject: RE: [PATCH] x86, sched: Allow NUMA nodes to share an LLC on Intel platforms
Date: Tue, 9 Feb 2021 23:09:27 +0000 [thread overview]
Message-ID: <af770863e70340d294c324fd7004f658@intel.com> (raw)
In-Reply-To: <20210209223943.9834-1-alison.schofield@intel.com>
> +#define X86_BUG_NUMA_SHARES_LLC X86_BUG(25) /* CPU may enumerate an LLC shared by multiple NUMA nodes */
During internal review I wondered why this is a "BUG" rather than a "FEATURE" bit.
Apparently, the suggestion for "BUG" came from earlier community discussions.
Historically it may have seemed reasonable to say that a cache cannot span
NUMA domains. But with more and more things moving off the motherboard
and into the socket, this doesn't seem too weird now.
-Tony
next prev parent reply other threads:[~2021-02-10 1:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 22:39 [PATCH] x86, sched: Allow NUMA nodes to share an LLC on Intel platforms Alison Schofield
2021-02-09 23:09 ` Luck, Tony [this message]
2021-02-10 8:10 ` Peter Zijlstra
2021-02-10 17:41 ` Dave Hansen
2021-02-10 8:05 ` Peter Zijlstra
2021-02-10 15:22 ` Dave Hansen
2021-02-10 19:38 ` Peter Zijlstra
2021-02-10 22:11 ` Alison Schofield
2021-02-16 11:29 ` Peter Zijlstra
2021-02-16 19:53 ` Alison Schofield
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