From: Thomas Gleixner <tglx@linutronix.de>
To: Henning Schild <henning.schild@siemens.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Ingo Molnar <mingo@kernel.org>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Borislav Petkov <bp@alien8.de>, Yinghai Lu <yinghai@kernel.org>
Subject: Re: [3/8] x86/tsc: Store and check TSC ADJUST MSR
Date: Mon, 30 Jan 2017 14:04:46 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.20.1701301404160.3606@nanos> (raw)
In-Reply-To: <20170130131301.7ddae08d@md1em3qc>
On Mon, 30 Jan 2017, Henning Schild wrote:
> On Mon, 30 Jan 2017 11:20:25 +0100
> Thomas Gleixner <tglx@linutronix.de> wrote:
> > There is nothing you can ever be sure about, but I doubt that the
> > ADJUST MSR is going to vanish.
>
> That sounds very much like i expected. But assuming the MSR has come to
> stay, the problem should be solved for recent kernels and Intel-CPUs.
>
> The AMD-Manual from 12/16 does not mention that MSR. I do not have
> access to an AMD machine. But i can only assume that bigger machines
> also suffer from async TSCs and basically all fall back to HPET.
Borislav?
next prev parent reply other threads:[~2017-01-30 13:06 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-19 13:47 [patch 0/8] x86/tsc: Utilize TSC_ADJUST MSR Thomas Gleixner
2016-11-19 13:47 ` [patch 1/8] x86/tsc: Use X86_FEATURE_TSC_ADJUST in detect_art() Thomas Gleixner
2016-11-29 16:46 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:28 ` tip-bot for Thomas Gleixner
2016-11-19 13:47 ` [patch 2/8] x86/tsc: Detect random warps Thomas Gleixner
2016-11-29 16:46 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:28 ` tip-bot for Thomas Gleixner
2016-11-19 13:47 ` [patch 3/8] x86/tsc: Store and check TSC ADJUST MSR Thomas Gleixner
2016-11-29 16:47 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:29 ` tip-bot for Thomas Gleixner
2017-01-27 13:36 ` [3/8] " Henning Schild
2017-01-30 10:20 ` Thomas Gleixner
2017-01-30 12:13 ` Henning Schild
2017-01-30 13:04 ` Thomas Gleixner [this message]
2017-01-30 15:58 ` Borislav Petkov
2016-11-19 13:47 ` [patch 4/8] x86/tsc: Verify TSC_ADJUST from idle Thomas Gleixner
2016-11-20 13:10 ` Peter Zijlstra
2016-11-21 8:16 ` Thomas Gleixner
2016-11-21 11:06 ` Peter Zijlstra
2016-11-29 9:17 ` Thomas Gleixner
2016-11-29 14:25 ` Ingo Molnar
2016-11-21 22:57 ` Andi Kleen
2016-11-29 16:47 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:29 ` tip-bot for Thomas Gleixner
2016-11-19 13:47 ` [patch 5/8] x86/tsc: Sync test only for the first cpu in a package Thomas Gleixner
2016-11-29 16:48 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:30 ` tip-bot for Thomas Gleixner
2016-11-19 13:47 ` [patch 6/8] x86/tsc: Move sync cleanup to a safe place Thomas Gleixner
2016-11-29 16:48 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:30 ` tip-bot for Thomas Gleixner
2016-11-19 13:47 ` [patch 7/8] x86/tsc: Prepare warp test for TSC adjustment Thomas Gleixner
2016-11-29 16:49 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:31 ` tip-bot for Thomas Gleixner
2016-11-19 13:47 ` [patch 8/8] x86/tsc: Try to adjust TSC if sync test fails Thomas Gleixner
2016-11-29 16:49 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-11-29 18:31 ` tip-bot for Thomas Gleixner
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