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From: Thomas Gleixner <tglx@linutronix.de>
To: Christoph Hellwig <hch@lst.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	palmer@sifive.com, jason@lakedaemon.net, robh+dt@kernel.org,
	mark.rutland@arm.com, devicetree@vger.kernel.org,
	aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, shorne@gmail.com,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH 3/6] irqchip: RISC-V Local Interrupt Controller Driver
Date: Thu, 2 Aug 2018 11:44:50 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.21.1808021142350.2037@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20180802094300.GA14127@lst.de>

On Thu, 2 Aug 2018, Christoph Hellwig wrote:
> On Thu, Aug 02, 2018 at 11:35:43AM +0200, Thomas Gleixner wrote:
> > So that's the low level per cpu interrupt/exception distribution mechanism,
> > i.e. a distinct per cpu 'vector' space with fixed functionality. It does
> > not make sense to actually handle that as an irq chip. It has absolutely no
> > relevance. The software interrupts are enabled when the CPU is started and
> > the external ones as well as they are gated by the PLIC.
> > 
> > The only thing which might need to access the enable register is the local
> > timer interrupt. That really does not require an extra irq chip as the
> > enable/disable is really just at cpu up/down time and the magic happens on
> > the local CPU so no smp functional call hackery is required.
> > 
> > The PLIC is the beast which wants a proper irqdomain/irqchip
> > implementation.
> 
> And that is exactly what I've done in the repost.

Ok.

> I need to polish the DT binding a little more and will repost later today.

Lemme go through that reposted series quickly.

Thanks,

	tglx

  reply	other threads:[~2018-08-02  9:44 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-25  9:36 RISC-V irqchip drivers Christoph Hellwig
2018-07-25  9:36 ` [PATCH 1/6] RISC-V: simplify software interrupt / IPI code Christoph Hellwig
2018-07-25 21:44   ` Palmer Dabbelt
2018-07-26  8:10     ` Christoph Hellwig
2018-07-25  9:36 ` [PATCH 2/6] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h Christoph Hellwig
2018-07-25 21:44   ` Palmer Dabbelt
2018-07-25  9:36 ` [PATCH 3/6] irqchip: RISC-V Local Interrupt Controller Driver Christoph Hellwig
2018-07-25 11:18   ` Marc Zyngier
2018-07-25 11:24     ` Christoph Hellwig
2018-07-25 11:37       ` Marc Zyngier
2018-07-25 17:54         ` Atish Patra
2018-07-26  3:38       ` Anup Patel
2018-07-26  8:27         ` Christoph Hellwig
2018-07-26 13:39           ` Anup Patel
2018-08-01 18:55       ` Thomas Gleixner
2018-08-02  7:34         ` Christoph Hellwig
2018-08-02  9:35           ` Thomas Gleixner
2018-08-02  9:43             ` Christoph Hellwig
2018-08-02  9:44               ` Thomas Gleixner [this message]
2018-08-04  4:03         ` Palmer Dabbelt
2018-08-04 16:40           ` Thomas Gleixner
2018-07-25  9:36 ` [PATCH 4/6] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs Christoph Hellwig
2018-07-31 22:37   ` Rob Herring
2018-08-01  7:13     ` Christoph Hellwig
2018-08-01 18:14       ` Rob Herring
2018-07-25  9:36 ` [PATCH 5/6] irqchip: New RISC-V PLIC Driver Christoph Hellwig
2018-07-25  9:36 ` [PATCH 6/6] dt-bindings: interrupt-controller: RISC-V PLIC documentation Christoph Hellwig
2018-07-31 22:46   ` Rob Herring
2018-08-01  7:16     ` Christoph Hellwig
2018-08-01 18:26       ` Rob Herring
2018-08-02  9:55         ` Christoph Hellwig
2018-08-02 14:43           ` Rob Herring
2018-08-04  1:48         ` Palmer Dabbelt
2018-07-25 21:26 ` RISC-V irqchip drivers Palmer Dabbelt

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