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From: Alexander Monakov <amonakov@ispras.ru>
To: linux-kernel@vger.kernel.org
Cc: Joerg Roedel <joro@8bytes.org>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	iommu@lists.linux-foundation.org,
	Shuah Khan <skhan@linuxfoundation.org>
Subject: Re: [PATCH] iommu/amd: Fix event counter availability check
Date: Sun, 31 May 2020 10:22:04 +0300 (MSK)	[thread overview]
Message-ID: <alpine.LNX.2.20.13.2005311014450.16067@monopod.intra.ispras.ru> (raw)
In-Reply-To: <20200529200738.1923-1-amonakov@ispras.ru>

Hi,

Adding Shuah Khan to Cc: I've noticed you've seen this issue on Ryzen 2400GE;
can you have a look at the patch? Would be nice to know if it fixes the
problem for you too.

Thanks.
Alexander

On Fri, 29 May 2020, Alexander Monakov wrote:

> The driver performs an extra check if the IOMMU's capabilities advertise
> presence of performance counters: it verifies that counters are writable
> by writing a hard-coded value to a counter and testing that reading that
> counter gives back the same value.
> 
> Unfortunately it does so quite early, even before pci_enable_device is
> called for the IOMMU, i.e. when accessing its MMIO space is not
> guaranteed to work. On Ryzen 4500U CPU, this actually breaks the test:
> the driver assumes the counters are not writable, and disables the
> functionality.
> 
> Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves
> the issue. This is the earliest point in amd_iommu_init_pci where the
> call succeeds on my laptop.
> 
> Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
> Cc: Joerg Roedel <joro@8bytes.org>
> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Cc: iommu@lists.linux-foundation.org
> ---
> 
> PS. I'm seeing another hiccup with IOMMU probing on my system:
> pci 0000:00:00.2: can't derive routing for PCI INT A
> pci 0000:00:00.2: PCI INT A: not connected
> 
> Hopefully I can figure it out, but I'd appreciate hints.
> 
>  drivers/iommu/amd_iommu_init.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
> index 5b81fd16f5fa..1b7ec6b6a282 100644
> --- a/drivers/iommu/amd_iommu_init.c
> +++ b/drivers/iommu/amd_iommu_init.c
> @@ -1788,8 +1788,6 @@ static int __init iommu_init_pci(struct amd_iommu *iommu)
>  	if (iommu->cap & (1UL << IOMMU_CAP_NPCACHE))
>  		amd_iommu_np_cache = true;
>  
> -	init_iommu_perf_ctr(iommu);
> -
>  	if (is_rd890_iommu(iommu->dev)) {
>  		int i, j;
>  
> @@ -1891,8 +1889,10 @@ static int __init amd_iommu_init_pci(void)
>  
>  	init_device_table_dma();
>  
> -	for_each_iommu(iommu)
> +	for_each_iommu(iommu) {
>  		iommu_flush_all_caches(iommu);
> +		init_iommu_perf_ctr(iommu);
> +	}
>  
>  	if (!ret)
>  		print_iommu_info();
> 
> base-commit: 75caf310d16cc5e2f851c048cd597f5437013368
> 

  reply	other threads:[~2020-05-31  7:22 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-29 20:07 [PATCH] iommu/amd: Fix event counter availability check Alexander Monakov
2020-05-31  7:22 ` Alexander Monakov [this message]
2020-06-01  2:48   ` Paul Menzel
2021-02-21 13:44     ` Paul Menzel
2020-06-02 23:51   ` Shuah Khan
2020-06-03  6:54     ` Alexander Monakov
2021-02-26 21:44       ` Paul Menzel
2021-02-26 21:55         ` Shuah Khan
2020-06-01  7:37 ` Suravee Suthikulpanit
2020-06-01  9:01   ` Alexander Monakov
2020-06-01 15:10     ` Suravee Suthikulpanit
2020-06-01 16:09       ` Alexander Monakov
2020-06-15 20:48       ` Alexander Monakov
2020-06-16  9:35         ` Suravee Suthikulpanit
2020-06-30 19:22           ` Alexander Monakov
2020-09-17 17:55           ` Alexander Monakov
2021-02-21 13:49             ` Paul Menzel
2021-02-22 17:59               ` Suravee Suthikulpanit
2021-02-24 20:35                 ` Paul Menzel

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