Re: [PATCH v5 2/5] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings

[Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>]

On 12/8/2021 2:54 PM, Srinivas Kandagatla wrote:
Thanks froYour time Srini!!!
>
> On 07/12/2021 15:35, Srinivasa Rao Mandadapu wrote:
>> Add device tree binding Documentation details for Qualcomm SC7280
>> LPASS LPI pinctrl driver.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>
>
> I remember in my previous review that I requested you to use git mv 
> for renaming this
Yes. Created patch with "git mv" and commit. Not sure why diff is not as 
expected.
>
> If you do that you will endup diff stat something like this:
>
> ------------------------->cut<-----------------------------
> diff --git 
> a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml 
> b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml 
>
> similarity index 97%
> rename from 
> Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml
> rename to 
> Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
> index e47ebf934daf..76f205a47640 100644
> --- 
> a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml
> +++ 
> b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
> @@ -1,7 +1,7 @@
>  # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>  %YAML 1.2
>  ---
> -$id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-pinctrl.yaml#
> +$id: 
> http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>
>  title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
> ------------------------->cut<-----------------------------
>
> --srini
>
>> .../pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml     | 115 
>> +++++++++++++++++++++
>>   1 file changed, 115 insertions(+)
>>   create mode 100644 
>> Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml 
>> b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml 
>>
>> new file mode 100644
>> index 0000000..d32ee32
>> --- /dev/null
>> +++ 
>> b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
>> @@ -0,0 +1,115 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: 
>> http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
>> +  Low Power Island (LPI) TLMM block
>> +
>> +maintainers:
>> +  - Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
>> +  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> +
>> +description: |
>> +  This binding describes the Top Level Mode Multiplexer block found 
>> in the
>> +  LPASS LPI IP on most Qualcomm SoCs
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sc7280-lpass-lpi-pinctrl
>> +
>> +  reg:
>> +    minItems: 2
>> +    maxItems: 2
>> +
>> +  gpio-controller: true
>> +
>> +  '#gpio-cells':
>> +    description: Specifying the pin number and flags, as defined in
>> +      include/dt-bindings/gpio/gpio.h
>> +    const: 2
>> +
>> +  gpio-ranges:
>> +    maxItems: 1
>> +
>> +#PIN CONFIGURATION NODES
>> +patternProperties:
>> +  '-pins$':
>> +    type: object
>> +    description:
>> +      Pinctrl node's client devices use subnodes for desired pin 
>> configuration.
>> +      Client device subnodes use below standard properties.
>> +    $ref: "/schemas/pinctrl/pincfg-node.yaml"
>> +
>> +    properties:
>> +      pins:
>> +        description:
>> +          List of gpio pins affected by the properties specified in 
>> this
>> +          subnode.
>> +        items:
>> +          oneOf:
>> +            - pattern: "^gpio([0-9]|[1-9][0-9])$"
>> +        minItems: 1
>> +        maxItems: 15
>> +
>> +      function:
>> +        enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, 
>> qua_mi2s_ws,
>> +                qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, 
>> i2s1_clk,
>> +                dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,
>> +                i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, 
>> dmic3_clk,
>> +                dmic3_data, i2s2_data ]
>> +        description:
>> +          Specify the alternative function to be configured for the 
>> specified
>> +          pins.
>> +
>> +      drive-strength:
>> +        enum: [2, 4, 6, 8, 10, 12, 14, 16]
>> +        default: 2
>> +        description:
>> +          Selects the drive strength for the specified pins, in mA.
>> +
>> +      slew-rate:
>> +        enum: [0, 1, 2, 3]
>> +        default: 0
>> +        description: |
>> +            0: No adjustments
>> +            1: Higher Slew rate (faster edges)
>> +            2: Lower Slew rate (slower edges)
>> +            3: Reserved (No adjustments)
>> +
>> +      bias-pull-down: true
>> +
>> +      bias-pull-up: true
>> +
>> +      bias-disable: true
>> +
>> +      output-high: true
>> +
>> +      output-low: true
>> +
>> +    required:
>> +      - pins
>> +      - function
>> +
>> +    additionalProperties: false
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - gpio-controller
>> +  - '#gpio-cells'
>> +  - gpio-ranges
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    lpass_tlmm: pinctrl@33c0000 {
>> +        compatible = "qcom,sc7280-lpass-lpi-pinctrl";
>> +        reg = <0x33c0000 0x20000>,
>> +              <0x3550000 0x10000>;
>> +        gpio-controller;
>> +        #gpio-cells = <2>;
>> +        gpio-ranges = <&lpass_tlmm 0 0 15>;
>> +    };
>>