From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
To: Robin Murphy <robin.murphy@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Cc: Madalin-cristian Bucur <madalin.bucur@nxp.com>,
Roy Pledge <roy.pledge@nxp.com>, Leo Li <leoyang.li@nxp.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"davem@davemloft.net" <davem@davemloft.net>
Subject: Re: [PATCH 16/21] arm64: dts: ls1046a: add smmu node
Date: Wed, 19 Sep 2018 13:51:57 +0000 [thread overview]
Message-ID: <c5dfa099-c927-8843-9519-0687e68c4faf@nxp.com> (raw)
In-Reply-To: <a4d32163-71b1-35df-3a4c-eb27b605fc46@arm.com>
Hi Robin,
On 19.09.2018 16:30, Robin Murphy wrote:
> On 19/09/18 13:36, laurentiu.tudor@nxp.com wrote:
>> From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>>
>> This allows for the SMMU device to be probed by the SMMU kernel driver.
>>
>> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>> ---
>> .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 42 +++++++++++++++++++
>> 1 file changed, 42 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> index ef83786b8b90..06863d3e4a7d 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>> @@ -228,6 +228,48 @@
>> bus-width = <4>;
>> };
>> + mmu: iommu@9000000 {
>> + compatible = "arm,mmu-500";
>> + reg = <0 0x9000000 0 0x400000>;
>> + dma-coherent;
>> + #global-interrupts = <2>;
>> + #iommu-cells = <1>;
>> + interrupts = <0 142 4>, /* global secure fault */
>
> Either that's not really the secure global interrupt, or those context
> interrupts are wrong.
Now that you pointing out, I realize that the comments don't make much
sense. Actually, 142 is the non-secure interrupt (all ints are ORed on
this IRQ) while 143 is the secure version. I'll update the comments in
the next re-spin.
---
Thanks & Best Regards, Laurentiu
>
>> + <0 143 4>, /* combined secure interrupt */
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>,
>> + <0 142 4>;
>> + };
>> +
>> scfg: scfg@1570000 {
>> compatible = "fsl,ls1046a-scfg", "syscon";
>> reg = <0x0 0x1570000 0x0 0x10000>;
>>
next prev parent reply other threads:[~2018-09-19 13:54 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-19 12:35 [PATCH 00/21] SMMU enablement for NXP LS1043A and LS1046A laurentiu.tudor
2018-09-19 12:35 ` [PATCH 01/21] soc/fsl/qman: fixup liodns only on ppc targets laurentiu.tudor
2018-09-19 12:35 ` [PATCH 02/21] soc/fsl/bman: map FBPR area in the iommu laurentiu.tudor
2018-09-19 12:35 ` [PATCH 03/21] soc/fsl/qman: map FQD and PFDR areas " laurentiu.tudor
2018-09-19 12:35 ` [PATCH 04/21] soc/fsl/qman-portal: map CENA area " laurentiu.tudor
2018-09-19 12:35 ` [PATCH 05/21] soc/fsl/qbman: add APIs to retrieve the probing status laurentiu.tudor
2018-09-19 12:35 ` [PATCH 06/21] soc/fsl/qman_portals: defer probe after qman's probe laurentiu.tudor
2018-09-19 12:35 ` [PATCH 07/21] soc/fsl/bman_portals: defer probe after bman's probe laurentiu.tudor
2018-09-19 12:36 ` [PATCH 08/21] soc/fsl/qbman_portals: add APIs to retrieve the probing status laurentiu.tudor
2018-09-19 12:36 ` [PATCH 09/21] fsl/fman: backup and restore ICID registers laurentiu.tudor
2018-09-19 12:36 ` [PATCH 10/21] fsl/fman: add API to get the device behind a fman port laurentiu.tudor
2018-09-19 12:36 ` [PATCH 11/21] dpaa_eth: defer probing after qbman laurentiu.tudor
2018-09-19 12:36 ` [PATCH 12/21] dpaa_eth: base dma mappings on the fman rx port laurentiu.tudor
2018-09-19 12:36 ` [PATCH 13/21] dpaa_eth: fix iova handling for contiguous frames laurentiu.tudor
2018-09-19 12:36 ` [PATCH 14/21] dpaa_eth: fix iova handling for sg frames laurentiu.tudor
2018-09-19 12:36 ` [PATCH 15/21] dpaa_eth: fix SG frame cleanup laurentiu.tudor
2018-09-19 12:36 ` [PATCH 16/21] arm64: dts: ls1046a: add smmu node laurentiu.tudor
2018-09-19 13:30 ` Robin Murphy
2018-09-19 13:51 ` Laurentiu Tudor [this message]
2018-09-19 12:36 ` [PATCH 17/21] arm64: dts: ls1043a: " laurentiu.tudor
2018-09-19 12:36 ` [PATCH 18/21] arm64: dts: ls104xa: set mask to drop TBU ID from StreamID laurentiu.tudor
2018-09-19 13:41 ` Robin Murphy
2018-09-19 14:06 ` Laurentiu Tudor
2018-09-19 12:36 ` [PATCH 19/21] arm64: dts: ls104x: add missing dma ranges property laurentiu.tudor
2018-09-19 12:36 ` [PATCH 20/21] arm64: dts: ls104x: add iommu-map to pci controllers laurentiu.tudor
2018-09-19 12:36 ` [PATCH 21/21] arm64: dts: ls104x: make dma-coherent global to the SoC laurentiu.tudor
2018-09-19 13:25 ` [PATCH 00/21] SMMU enablement for NXP LS1043A and LS1046A Robin Murphy
2018-09-19 14:18 ` Laurentiu Tudor
2018-09-19 14:37 ` Robin Murphy
2018-09-20 10:38 ` Laurentiu Tudor
2018-09-20 11:49 ` Robin Murphy
2018-09-20 14:33 ` Laurentiu Tudor
2018-09-20 19:07 ` Li Yang
2018-09-21 7:32 ` Laurentiu Tudor
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