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From: Oleksij Rempel <o.rempel@pengutronix.de>
To: peng.fan@nxp.com, shawnguo@kernel.org, s.hauer@pengutronix.de,
	jassisinghbrar@gmail.com
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	Anson.Huang@nxp.com, leonard.crestez@nxp.com,
	aisheng.dong@nxp.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V4 3/4] mailbox: imx: add SCU MU support
Date: Tue, 3 Mar 2020 07:46:08 +0100	[thread overview]
Message-ID: <cad0891c-6c81-3dd8-924b-06e920408243@pengutronix.de> (raw)
In-Reply-To: <1583200380-15623-4-git-send-email-peng.fan@nxp.com>



On 03.03.20 02:52, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX8/8X SCU MU is dedicated for communication between SCU and Cortex-A
> cores from hardware design, and could not be reused for other purpose.
> 
> Per i.MX8/8X Reference mannual, Chapter "12.9.2.3.2 Messaging Examples",
>   Passing short messages: Transmit register(s) can be used to pass
>   short messages from one to four words in length. For example, when
>   a four-word message is desired, only one of the registers needs to
>   have its corresponding interrupt enable bit set at the receiver side;
>   the message’s first three words are written to the registers whose
>   interrupt is masked, and the fourth word is written to the other
>   register (which triggers an interrupt at the receiver side).
> 
> i.MX8/8X SCU firmware IPC is an implementation of passing short
> messages. But current imx-mailbox driver only support one word
> message, i.MX8/8X linux side firmware has to request four TX
> and four RX to support IPC to SCU firmware. This is low efficent
> and more interrupts triggered compared with one TX and
> one RX.
> 
> To make SCU MU work,
>    - parse the size of msg.
>    - Only enable TR0/RR0 interrupt for transmit/receive message.
>    - For TX/RX, only support one TX channel and one RX channel
>    - For RX, support receive msg larger than 4 u32 words.
>    - Support 6 channels, TX0/RX0/RXDB[0-3], not support TXDB.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> V4:
>   Added separate chans init and xlate function for SCU MU
>   Limit chans to TX0/RX0/RXDB[0-3], max 6 chans.
>   Santity check to msg size
> 
> V3:
>   Added scu type tx/rx and SCU MU type
> 
>   drivers/mailbox/imx-mailbox.c | 128 +++++++++++++++++++++++++++++++++++++++++-
>   1 file changed, 127 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
> index e98f3550f995..fbdcd68d8490 100644
> --- a/drivers/mailbox/imx-mailbox.c
> +++ b/drivers/mailbox/imx-mailbox.c
> @@ -4,6 +4,7 @@
>    */
>   
>   #include <linux/clk.h>
> +#include <linux/firmware/imx/ipc.h>
>   #include <linux/interrupt.h>
>   #include <linux/io.h>
>   #include <linux/kernel.h>
> @@ -27,6 +28,8 @@
>   #define IMX_MU_xCR_GIRn(x)	BIT(16 + (3 - (x)))
>   
>   #define IMX_MU_CHANS		16
> +/* TX0/RX0/RXDB[0-3] */
> +#define IMX_MU_SCU_CHANS	6
>   #define IMX_MU_CHAN_NAME_SIZE	20
>   
>   enum imx_mu_chan_type {
> @@ -39,6 +42,11 @@ enum imx_mu_chan_type {
>   struct imx_mu_priv;
>   struct imx_mu_con_priv;
>   
> +struct imx_sc_rpc_msg_max {
> +	struct imx_sc_rpc_msg hdr;
> +	u32 data[7];
> +} __packed __aligned(4);

__packed __aligned(4) looks like some sort of superstition. hdr is 4 byte and u32 is 4 
byte as well. What kind of problems should it solve?



> +
>   struct imx_mu_dcfg {
>   	int (*tx)(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp, void *data);
>   	int (*rx)(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp);
> @@ -136,6 +144,56 @@ static int imx_mu_generic_rx(struct imx_mu_priv *priv,
>   	return 0;
>   }
>   
> +static int imx_mu_scu_tx(struct imx_mu_priv *priv,
> +			 struct imx_mu_con_priv *cp,
> +			 void *data)
> +{
> +	struct imx_sc_rpc_msg_max *msg = data;
> +	u32 *arg = data;
> +	int i;
> +
> +	switch (cp->type) {
> +	case IMX_MU_TYPE_TX:
> +		if (msg->hdr.size > sizeof(struct imx_sc_rpc_msg_max)) {

please use, sizeof(*msg)

and we need here a comment:
/* the real message size can be different to struct imx_sc_rpc_msg_max size */

> +			dev_err(priv->dev, "Exceed max msg size\n");

please,
dev_err(priv->dev, "Exceed max msg size (%i) on TX, got: %i\n", sizeof(msg), msg.hdr.size);

or some thing like this.

> +			return -EINVAL;
> +		}

please add space

> +		for (i = 0; i < msg->hdr.size; i++) {
> +			imx_mu_write(priv, *arg++,
> +				     priv->dcfg->xTR[i % 4]);
> +		}

please remove {}

> +		imx_mu_xcr_rmw(priv, IMX_MU_xCR_TIEn(cp->idx), 0);
> +		break;
> +	default:
> +		dev_warn_ratelimited(priv->dev, "Send data on wrong channel type: %d\n", cp->type);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
> +static int imx_mu_scu_rx(struct imx_mu_priv *priv,
> +			 struct imx_mu_con_priv *cp)
> +{
> +	struct imx_sc_rpc_msg_max msg;
> +	u32 *data = (u32 *)&msg;
> +	int i;
> +
> +	imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_RIEn(0));
> +	*data++ = imx_mu_read(priv, priv->dcfg->xRR[0]);

please add space

> +	if (msg.hdr.size > sizeof(struct imx_sc_rpc_msg_max)) {

please use sizeof(msg) instead.

> +		dev_err(priv->dev, "Exceed max msg size\n");

please,
dev_err(priv->dev, "Exceed max msg size (%i) on RX, got: %i\n", sizeof(msg), msg.hdr.size);

or some thing like this.

> +		return -EINVAL;
> +	}

please add space

> +	for (i = 1; i < msg.hdr.size; i++)
> +		*data++ = imx_mu_read(priv, priv->dcfg->xRR[i % 4]);
> +
> +	imx_mu_xcr_rmw(priv, IMX_MU_xCR_RIEn(0), 0);
> +	mbox_chan_received_data(cp->chan, (void *)&msg);
> +
> +	return 0;
> +}
> +
>   static void imx_mu_txdb_tasklet(unsigned long data)
>   {
>   	struct imx_mu_con_priv *cp = (struct imx_mu_con_priv *)data;
> @@ -265,6 +323,39 @@ static const struct mbox_chan_ops imx_mu_ops = {
>   	.shutdown = imx_mu_shutdown,
>   };
>   
> +static struct mbox_chan *imx_mu_scu_xlate(struct mbox_controller *mbox,
> +					  const struct of_phandle_args *sp)
> +{
> +	u32 type, idx, chan;
> +
> +	if (sp->args_count != 2) {
> +		dev_err(mbox->dev, "Invalid argument count %d\n", sp->args_count);
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	type = sp->args[0]; /* channel type */
> +	idx = sp->args[1]; /* index */
> +
> +	switch (type) {
> +	case IMX_MU_TYPE_TX:
> +	case IMX_MU_TYPE_RX:

please add sanity check for idx and print some error.

> +		chan = type;
> +		break;
> +	case IMX_MU_TYPE_RXDB:
> +		chan = 2 + idx;
> +		break;
> +	default:

please print here some useful error.

> +		return NULL;
> +	}
> +
> +	if (chan >= mbox->num_chans) {
> +		dev_err(mbox->dev, "Not supported channel number: %d. (type: %d, idx: %d)\n", chan, type, idx);
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	return &mbox->chans[chan];
> +}
> +
>   static struct mbox_chan * imx_mu_xlate(struct mbox_controller *mbox,
>   				       const struct of_phandle_args *sp)
>   {
> @@ -312,6 +403,28 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv)
>   	imx_mu_write(priv, 0, priv->dcfg->xCR);
>   }
>   
> +static void imx_mu_init_scu(struct imx_mu_priv *priv)
> +{
> +	unsigned int i;
> +
> +	for (i = 0; i < IMX_MU_SCU_CHANS; i++) {
> +		struct imx_mu_con_priv *cp = &priv->con_priv[i];
> +
> +		cp->idx = i < 2 ? 0 : i - 2;
> +		cp->type = i < 2 ? i : IMX_MU_TYPE_RXDB;
> +		cp->chan = &priv->mbox_chans[i];
> +		priv->mbox_chans[i].con_priv = cp;
> +		snprintf(cp->irq_desc, sizeof(cp->irq_desc),
> +			 "imx_mu_chan[%i-%i]", cp->type, cp->idx);
> +	}
> +
> +	priv->mbox.num_chans = IMX_MU_SCU_CHANS;
> +	priv->mbox.of_xlate = imx_mu_scu_xlate;
> +
> +	/* Set default MU configuration */
> +	imx_mu_write(priv, 0, priv->dcfg->xCR);
> +}
> +
>   static int imx_mu_probe(struct platform_device *pdev)
>   {
>   	struct device *dev = &pdev->dev;
> @@ -355,7 +468,10 @@ static int imx_mu_probe(struct platform_device *pdev)
>   
>   	priv->side_b = of_property_read_bool(np, "fsl,mu-side-b");
>   
> -	imx_mu_init_generic(priv);
> +	if (of_device_is_compatible(np, "fsl,imx8-mu-scu"))
> +		imx_mu_init_scu(priv);
> +	else
> +		imx_mu_init_generic(priv);

we already have a way to execute device specific functions, please be consequent.

>   
>   	spin_lock_init(&priv->xcr_lock);
>   
> @@ -396,9 +512,19 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx7ulp = {
>   	.xCR	= 0x64,
>   };
>   
> +static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = {
> +	.tx	= imx_mu_scu_tx,
> +	.rx	= imx_mu_scu_rx,
> +	.xTR	= {0x0, 0x4, 0x8, 0xc},
> +	.xRR	= {0x10, 0x14, 0x18, 0x1c},
> +	.xSR	= 0x20,
> +	.xCR	= 0x24,
> +};
> +
>   static const struct of_device_id imx_mu_dt_ids[] = {
>   	{ .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp },
>   	{ .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
> +	{ .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu },
>   	{ },
>   };
>   MODULE_DEVICE_TABLE(of, imx_mu_dt_ids);
> 

Kind regards,
Oleksij Rempel

-- 
Pengutronix e.K.                           |                             |
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  reply	other threads:[~2020-03-03  6:46 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-03  1:52 [PATCH V4 0/4] mailbox/firmware: imx: support SCU channel type peng.fan
2020-03-03  1:52 ` [PATCH V4 1/4] dt-bindings: mailbox: imx-mu: add SCU MU support peng.fan
2020-03-03  1:52 ` [PATCH V4 2/4] mailbox: imx: restructure code to make easy for new MU peng.fan
2020-03-03  6:13   ` Oleksij Rempel
2020-03-03  6:27     ` Peng Fan
2020-03-03  6:47       ` Oleksij Rempel
2020-03-03  1:52 ` [PATCH V4 3/4] mailbox: imx: add SCU MU support peng.fan
2020-03-03  6:46   ` Oleksij Rempel [this message]
2020-03-03  6:53     ` Peng Fan
2020-03-03  1:53 ` [PATCH V4 4/4] firmware: imx-scu: Support one TX and one RX peng.fan

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