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From: Neil Armstrong <narmstrong@baylibre.com>
To: jbrunet@baylibre.com
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/4] clk: meson: regmap: export regmap_div ops functions
Date: Tue, 30 Jul 2019 17:15:09 +0200	[thread overview]
Message-ID: <cd1d5041-3f48-93ba-ad66-8737a2e3cde9@baylibre.com> (raw)
In-Reply-To: <20190729131656.7308-3-narmstrong@baylibre.com>

On 29/07/2019 15:16, Neil Armstrong wrote:
> The G12A CPU Clock Postmux divider needs a custom div_set_rate() call.
> 
> Export the clk_regmap_div_round_rate() and clk_regmap_div_recalc_rate()
> to be able to override the default clk_regmap_div_set_rate() callback.

Signoff missing.... will fix in v2

> ---
>  drivers/clk/meson/clk-regmap.c | 10 ++++++----
>  drivers/clk/meson/clk-regmap.h |  5 +++++
>  2 files changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c
> index dcd1757cc5df..26c8c74a8cf0 100644
> --- a/drivers/clk/meson/clk-regmap.c
> +++ b/drivers/clk/meson/clk-regmap.c
> @@ -56,8 +56,8 @@ const struct clk_ops clk_regmap_gate_ro_ops = {
>  };
>  EXPORT_SYMBOL_GPL(clk_regmap_gate_ro_ops);
>  
> -static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> -						unsigned long prate)
> +unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> +					 unsigned long prate)
>  {
>  	struct clk_regmap *clk = to_clk_regmap(hw);
>  	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
> @@ -74,9 +74,10 @@ static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
>  	return divider_recalc_rate(hw, prate, val, div->table, div->flags,
>  				   div->width);
>  }
> +EXPORT_SYMBOL_GPL(clk_regmap_div_recalc_rate);
>  
> -static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> -				      unsigned long *prate)
> +long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> +			       unsigned long *prate)
>  {
>  	struct clk_regmap *clk = to_clk_regmap(hw);
>  	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
> @@ -100,6 +101,7 @@ static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
>  	return divider_round_rate(hw, rate, prate, div->table, div->width,
>  				  div->flags);
>  }
> +EXPORT_SYMBOL_GPL(clk_regmap_div_round_rate);
>  
>  static int clk_regmap_div_set_rate(struct clk_hw *hw, unsigned long rate,
>  				   unsigned long parent_rate)
> diff --git a/drivers/clk/meson/clk-regmap.h b/drivers/clk/meson/clk-regmap.h
> index c4a39604cffd..ebf776a32ce3 100644
> --- a/drivers/clk/meson/clk-regmap.h
> +++ b/drivers/clk/meson/clk-regmap.h
> @@ -78,6 +78,11 @@ clk_get_regmap_div_data(struct clk_regmap *clk)
>  	return (struct clk_regmap_div_data *)clk->data;
>  }
>  
> +unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> +					 unsigned long prate);
> +long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> +			       unsigned long *prate);
> +
>  extern const struct clk_ops clk_regmap_divider_ops;
>  extern const struct clk_ops clk_regmap_divider_ro_ops;
>  
> 


  reply	other threads:[~2019-07-30 15:15 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-29 13:16 [PATCH 0/4] clk: meson: g12a: add support for DVFS Neil Armstrong
2019-07-29 13:16 ` [PATCH 1/4] clk: core: introduce clk_hw_set_parent() Neil Armstrong
2019-07-29 13:16 ` [PATCH 2/4] clk: meson: regmap: export regmap_div ops functions Neil Armstrong
2019-07-30 15:15   ` Neil Armstrong [this message]
2019-07-29 13:16 ` [PATCH 3/4] clk: meson: g12a: add notifiers to handle cpu clock change Neil Armstrong
2019-07-30  8:37   ` Jerome Brunet
2019-07-30 15:14     ` Neil Armstrong
2019-07-29 13:16 ` [PATCH 4/4] clk: meson: g12a: expose CPUB clock ID for G12B Neil Armstrong
2019-07-30 15:15   ` Neil Armstrong

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