From: Reinette Chatre <reinette.chatre@intel.com>
To: tglx@linutronix.de, fenghua.yu@intel.com, tony.luck@intel.com,
peterz@infradead.org, mingo@redhat.com, acme@kernel.org,
vikas.shivappa@linux.intel.com
Cc: gavin.hindman@intel.com, jithu.joseph@intel.com,
dave.hansen@intel.com, hpa@zytor.com, x86@kernel.org,
linux-kernel@vger.kernel.org,
Reinette Chatre <reinette.chatre@intel.com>
Subject: [PATCH V2 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf
Date: Thu, 16 Aug 2018 13:16:03 -0700 [thread overview]
Message-ID: <cover.1534450299.git.reinette.chatre@intel.com> (raw)
Dear Maintainers,
This is the second attempt at fixing the lack of coordination between the
pseudo-locking measurement code and perf. Thank you very much for your
feedback on the first version. The entire solution, including the cover
letter, has been reworked based on your feedback, while submitted as a V2,
none of the patches from V1 remained.
Changes since V1:
- Use in-kernel interface to perf.
- Do not write directly to PMU registers.
- Do not introduce another PMU owner. perf maintains role as performing
resource arbitration for PMU.
- User space is able to use perf and resctrl at the same time.
- event_base_rdpmc is accessed and used only within an interrupts
disabled section.
- Internals of events are never accessed directly, inline function used.
- Due to "pinned" usage the scheduling of event may have failed. Error
state is checked in recommended way and have a credible error
handling.
- use X86_CONFIG
This code is based on the x86/cache branch of tip.git
The success of Cache Pseudo-Locking, as measured by how many cache lines
from a physical memory region has been locked to cache, can be measured
via the use of hardware performance events. Specifically, the number of
cache hits and misses reading a memory region after it has been
pseudo-locked to cache. This measurement is triggered via the resctrl
debugfs interface.
The current solution accesses performance counters and their configuration
registers directly without coordination with other performance event users
(perf).
Two of the issues that exist with the current solution:
- By writing to the performance monitoring registers directly a new owner
for these resources is introduced. The perf infrastructure already exist
to perform resource arbitration and the in-kernel infrastructure should
be used to do so.
- The current lack of coordination with perf will have consequences any time
two users, for example perf and cache pseudo-locking, attempt to do any
kind of measurement at the same time.
In this series the measurement of Cache Pseudo-Lock regions is moved to use
the in-kernel interface to perf. During the rework of the measurement
function the L2 and L3 cache measurements are separated to avoid the
additional code needed to decide on which measurement causing unrelated
cache hits and misses.
Your feedback on this work will be greatly appreciated.
Reinette
Reinette Chatre (6):
perf/core: Add sanity check to deal with pinned event failure
x86/intel_rdt: Remove local register variables
x86/intel_rdt: Create required perf event attributes
x86/intel_rdt: Add helper to obtain performance counter index
x86/intel_rdt: Use perf infrastructure for measurements
x86/intel_rdt: Re-enable pseudo-lock measurements
Documentation/x86/intel_rdt_ui.txt | 22 +-
arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 419 ++++++++++++++------
kernel/events/core.c | 6 +
3 files changed, 310 insertions(+), 137 deletions(-)
--
2.17.0
next reply other threads:[~2018-08-16 20:16 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-16 20:16 Reinette Chatre [this message]
2018-08-16 20:16 ` [PATCH V2 1/6] perf/core: Add sanity check to deal with pinned event failure Reinette Chatre
2018-08-16 20:16 ` [PATCH V2 2/6] x86/intel_rdt: Remove local register variables Reinette Chatre
2018-08-16 20:16 ` [PATCH V2 3/6] x86/intel_rdt: Create required perf event attributes Reinette Chatre
2018-08-16 20:16 ` [PATCH V2 4/6] x86/intel_rdt: Add helper to obtain performance counter index Reinette Chatre
2018-09-06 14:47 ` Peter Zijlstra
2018-09-06 23:26 ` Reinette Chatre
2018-08-16 20:16 ` [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements Reinette Chatre
2018-09-06 14:15 ` Peter Zijlstra
2018-09-06 19:21 ` Reinette Chatre
2018-09-06 19:44 ` Peter Zijlstra
2018-09-06 20:05 ` Reinette Chatre
2018-09-06 20:29 ` Peter Zijlstra
2018-09-06 20:37 ` Reinette Chatre
2018-09-06 21:38 ` Peter Zijlstra
2018-09-06 14:38 ` Peter Zijlstra
2018-08-16 20:16 ` [PATCH V2 6/6] x86/intel_rdt: Re-enable pseudo-lock measurements Reinette Chatre
2018-09-04 16:50 ` [PATCH V2 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf Reinette Chatre
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