From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: Rob Herring <robh+dt@kernel.org>
Cc: linuxarm@huawei.com, mauro.chehab@huawei.com,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
Binghui Wang <wangbinghui@hisilicon.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Jingoo Han <jingoohan1@gmail.com>,
Xiaowei Song <songxiaowei@hisilicon.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-phy@lists.infradead.org
Subject: [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work
Date: Tue, 3 Aug 2021 06:38:54 +0200 [thread overview]
Message-ID: <cover.1627965261.git.mchehab+huawei@kernel.org> (raw)
Hi Rob,
That's the third version of the DT bindings for Kirin 970 PCIE and its
corresponding PHY.
It is identical to v2, except by:
- pcie@7,0 { // Lane 7: Ethernet
+ pcie@7,0 { // Lane 6: Ethernet
at Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
IMO, the best would be to merge this series via your tree, as it
depends on the patch converting the DT bindings for the PCIe DWC
driver.
v3:
- Fixed a comment on patch 3: The Ethernet controller is at lane 6.
v2:
- removed the DTS file. I'll submit it in separate, once having
everything else merged;
- it now doesn't produce any warnings with:
make DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/hisilicon,kirin
-pcie.yaml DT_CHECKER_FLAGS=-m dt_binding_check
- added the upstream node;
- the clock enable now uses a new property (hisilicon,clken-gpios);
- the reg for the PCI devices are now properly filled;
- the pcie@x,y nodes now match the port number from table 4-1 from the
datasheet.
Mauro Carvalho Chehab (4):
dt-bindings: PCI: kirin: Fix compatible string
dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml
dt-bindings: PCI: kirin: Add support for Kirin970
dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
.../bindings/pci/hisilicon,kirin-pcie.yaml | 160 ++++++++++++++++++
.../devicetree/bindings/pci/kirin-pcie.txt | 50 ------
.../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +-
.../phy/hisilicon,phy-hi3670-pcie.yaml | 86 ++++++++++
MAINTAINERS | 2 +-
5 files changed, 248 insertions(+), 52 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
delete mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt
create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
--
2.31.1
next reply other threads:[~2021-08-03 4:39 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-03 4:38 Mauro Carvalho Chehab [this message]
2021-08-03 4:38 ` [PATCH v3 1/4] dt-bindings: PCI: kirin: Fix compatible string Mauro Carvalho Chehab
2021-08-03 22:22 ` Rob Herring
2021-08-03 4:38 ` [PATCH v3 2/4] dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml Mauro Carvalho Chehab
2021-08-03 22:27 ` Rob Herring
2021-08-03 4:38 ` [PATCH v3 3/4] dt-bindings: PCI: kirin: Add support for Kirin970 Mauro Carvalho Chehab
2021-08-03 4:38 ` [PATCH v3 4/4] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY Mauro Carvalho Chehab
2021-08-03 22:29 ` Rob Herring
2021-08-03 22:11 ` [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Rob Herring
2021-08-04 6:50 ` Mauro Carvalho Chehab
2021-08-04 16:28 ` Rob Herring
2021-08-05 7:46 ` Mauro Carvalho Chehab
2021-08-05 7:58 ` Mauro Carvalho Chehab
2021-08-06 16:23 ` Rob Herring
2021-08-10 9:42 ` Mauro Carvalho Chehab
2021-08-10 13:44 ` Rob Herring
2021-08-10 14:20 ` Mauro Carvalho Chehab
2021-08-10 17:13 ` Rob Herring
2021-08-10 17:52 ` Rob Herring
2021-08-11 7:11 ` Mauro Carvalho Chehab
2021-08-11 6:46 ` Mauro Carvalho Chehab
2021-08-12 3:13 ` Rob Herring
2021-08-12 7:48 ` Mauro Carvalho Chehab
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