From: Reinette Chatre <reinette.chatre@intel.com>
To: tglx@linutronix.de, fenghua.yu@intel.com, tony.luck@intel.com
Cc: gavin.hindman@intel.com, vikas.shivappa@linux.intel.com,
dave.hansen@intel.com, mingo@redhat.com, hpa@zytor.com,
x86@kernel.org, linux-kernel@vger.kernel.org,
Reinette Chatre <reinette.chatre@intel.com>
Subject: [RFC PATCH V2 09/22] x86/intel_rdt: Discover supported platforms via prefetch disable bits
Date: Tue, 13 Feb 2018 07:46:53 -0800 [thread overview]
Message-ID: <d44d5a2d01194fc6ca4fb05aabef954b5682a739.1518443616.git.reinette.chatre@intel.com> (raw)
In-Reply-To: <cover.1518443616.git.reinette.chatre@intel.com>
In-Reply-To: <cover.1518443616.git.reinette.chatre@intel.com>
Knowing the model specific prefetch disable bits is required to support
cache pseudo-locking because the hardware prefetchers need to be disabled
when the kernel memory is pseudo-locked to cache. We add these bits only
for platforms known to support cache pseudo-locking.
If we have not validated pseudo-locking on a platform that does support
RDT/CAT this should not be seen as a failure of CAT, the pseudo-locking
interface will just not be set up.
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 80 +++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
index 94bd1b4fbfee..a0c144b5b09b 100644
--- a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
+++ b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
@@ -24,8 +24,22 @@
#include <linux/seq_file.h>
#include <linux/stat.h>
#include <linux/slab.h>
+#include <asm/intel-family.h>
#include "intel_rdt.h"
+/*
+ * MSR_MISC_FEATURE_CONTROL register enables the modification of hardware
+ * prefetcher state. Details about this register can be found in the MSR
+ * tables for specific platforms found in Intel's SDM.
+ */
+#define MSR_MISC_FEATURE_CONTROL 0x000001a4
+
+/*
+ * The bits needed to disable hardware prefetching varies based on the
+ * platform. During initialization we will discover which bits to use.
+ */
+static u64 prefetch_disable_bits;
+
struct kernfs_node *pseudo_lock_kn;
/*
@@ -358,6 +372,57 @@ int rdt_pseudo_lock_rmdir(struct kernfs_node *kn)
}
/**
+ * get_prefetch_disable_bits - prefetch disable bits of supported platforms
+ *
+ * Here we capture the list of platforms that have been validated to support
+ * pseudo-locking. This includes testing to ensure pseudo-locked regions
+ * with low cache miss rates can be created under variety of load conditions
+ * as well as that these pseudo-locked regions can maintain their low cache
+ * miss rates under variety of load conditions for significant lengths of time.
+ *
+ * After a platform has been validated to support pseudo-locking its
+ * hardware prefetch disable bits are included here as they are documented
+ * in the SDM.
+ *
+ * RETURNS
+ * If platform is supported, the bits to disable hardware prefetchers, 0
+ * if platform is not supported.
+ */
+static u64 get_prefetch_disable_bits(void)
+{
+ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+ boot_cpu_data.x86 != 6)
+ return 0;
+
+ switch (boot_cpu_data.x86_model) {
+ case INTEL_FAM6_BROADWELL_X:
+ /*
+ * SDM defines bits of MSR_MISC_FEATURE_CONTROL register
+ * as:
+ * 0 L2 Hardware Prefetcher Disable (R/W)
+ * 1 L2 Adjacent Cache Line Prefetcher Disable (R/W)
+ * 2 DCU Hardware Prefetcher Disable (R/W)
+ * 3 DCU IP Prefetcher Disable (R/W)
+ * 63:4 Reserved
+ */
+ return 0xF;
+ case INTEL_FAM6_ATOM_GOLDMONT:
+ case INTEL_FAM6_ATOM_GEMINI_LAKE:
+ /*
+ * SDM defines bits of MSR_MISC_FEATURE_CONTROL register
+ * as:
+ * 0 L2 Hardware Prefetcher Disable (R/W)
+ * 1 Reserved
+ * 2 DCU Hardware Prefetcher Disable (R/W)
+ * 63:3 Reserved
+ */
+ return 0x5;
+ }
+
+ return 0;
+}
+
+/**
* rdt_pseudo_lock_fs_init - Create and initialize pseudo-locking files
* @root: location in kernfs where directory and files should be created
*
@@ -377,6 +442,17 @@ int rdt_pseudo_lock_fs_init(struct kernfs_node *root)
lockdep_assert_held(&rdtgroup_mutex);
+ /*
+ * Not knowing the bits to disable prefetching is not a failure
+ * that should be propagated since we only return prefetching bits
+ * for those platforms pseudo-locking has been tested on. If
+ * pseudo-locking has not been tested to work on this platform the
+ * other RDT features should continue to be available.
+ */
+ prefetch_disable_bits = get_prefetch_disable_bits();
+ if (prefetch_disable_bits == 0)
+ return 0;
+
pseudo_lock_kn = kernfs_create_dir(root, "pseudo_lock",
root->mode, NULL);
if (IS_ERR(pseudo_lock_kn))
@@ -420,6 +496,10 @@ int rdt_pseudo_lock_fs_init(struct kernfs_node *root)
void rdt_pseudo_lock_fs_remove(void)
{
lockdep_assert_held(&rdtgroup_mutex);
+
+ if (!pseudo_lock_kn)
+ return;
+
mutex_lock(&rdt_pseudo_lock_mutex);
if (new_plr) {
--
2.13.6
next prev parent reply other threads:[~2018-02-13 23:52 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-13 15:46 [RFC PATCH V2 00/22] Intel(R) Resource Director Technology Cache Pseudo-Locking enabling Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 01/22] x86/intel_rdt: Documentation for Cache Pseudo-Locking Reinette Chatre
2018-02-19 20:35 ` Thomas Gleixner
2018-02-19 22:15 ` Reinette Chatre
2018-02-19 22:19 ` Thomas Gleixner
2018-02-19 22:24 ` Reinette Chatre
2018-02-19 21:27 ` Randy Dunlap
2018-02-19 22:21 ` Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 02/22] x86/intel_rdt: Make useful functions available internally Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 03/22] x86/intel_rdt: Introduce hooks to create pseudo-locking files Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 04/22] x86/intel_rdt: Introduce test to determine if closid is in use Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 05/22] x86/intel_rdt: Print more accurate pseudo-locking availability Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 06/22] x86/intel_rdt: Create pseudo-locked regions Reinette Chatre
2018-02-19 20:57 ` Thomas Gleixner
2018-02-19 23:02 ` Reinette Chatre
2018-02-19 23:16 ` Thomas Gleixner
2018-02-20 3:21 ` Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 07/22] x86/intel_rdt: Connect pseudo-locking directory to operations Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 08/22] x86/intel_rdt: Introduce pseudo-locking resctrl files Reinette Chatre
2018-02-19 21:01 ` Thomas Gleixner
2018-02-13 15:46 ` Reinette Chatre [this message]
2018-02-13 15:46 ` [RFC PATCH V2 10/22] x86/intel_rdt: Disable pseudo-locking if CDP enabled Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 11/22] x86/intel_rdt: Associate pseudo-locked regions with its domain Reinette Chatre
2018-02-19 21:19 ` Thomas Gleixner
2018-02-19 23:00 ` Reinette Chatre
2018-02-19 23:19 ` Thomas Gleixner
2018-02-20 3:17 ` Reinette Chatre
2018-02-20 10:00 ` Thomas Gleixner
2018-02-20 16:02 ` Reinette Chatre
2018-02-20 17:18 ` Thomas Gleixner
2018-02-13 15:46 ` [RFC PATCH V2 12/22] x86/intel_rdt: Support CBM checking from value and character buffer Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 13/22] x86/intel_rdt: Support schemata write - pseudo-locking core Reinette Chatre
2018-02-20 17:15 ` Thomas Gleixner
2018-02-20 18:47 ` Reinette Chatre
2018-02-20 23:21 ` Thomas Gleixner
2018-02-21 1:58 ` Mike Kravetz
2018-02-21 6:10 ` Reinette Chatre
2018-02-21 8:34 ` Thomas Gleixner
2018-02-21 5:58 ` Reinette Chatre
2018-02-27 0:34 ` Reinette Chatre
2018-02-27 10:36 ` Thomas Gleixner
2018-02-27 15:38 ` Thomas Gleixner
2018-02-27 19:52 ` Reinette Chatre
2018-02-27 21:33 ` Reinette Chatre
2018-02-28 18:39 ` Thomas Gleixner
2018-02-28 19:17 ` Reinette Chatre
2018-02-28 19:40 ` Thomas Gleixner
2018-02-27 21:01 ` Reinette Chatre
2018-02-28 17:57 ` Thomas Gleixner
2018-02-28 17:59 ` Thomas Gleixner
2018-02-28 18:34 ` Reinette Chatre
2018-02-28 18:42 ` Thomas Gleixner
2018-02-13 15:46 ` [RFC PATCH V2 14/22] x86/intel_rdt: Enable testing for pseudo-locked region Reinette Chatre
2018-02-13 15:46 ` [RFC PATCH V2 15/22] x86/intel_rdt: Prevent new allocations from pseudo-locked regions Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 16/22] x86/intel_rdt: Create debugfs files for pseudo-locking testing Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 17/22] x86/intel_rdt: Create character device exposing pseudo-locked region Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 18/22] x86/intel_rdt: More precise L2 hit/miss measurements Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 19/22] x86/intel_rdt: Support L3 cache performance event of Broadwell Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 20/22] x86/intel_rdt: Limit C-states dynamically when pseudo-locking active Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 21/22] mm/hugetlb: Enable large allocations through gigantic page API Reinette Chatre
2018-02-13 15:47 ` [RFC PATCH V2 22/22] x86/intel_rdt: Support contiguous memory of all sizes Reinette Chatre
2018-02-14 18:12 ` [RFC PATCH V2 00/22] Intel(R) Resource Director Technology Cache Pseudo-Locking enabling Mike Kravetz
2018-02-14 18:31 ` Reinette Chatre
2018-02-15 20:39 ` Reinette Chatre
2018-02-15 21:10 ` Mike Kravetz
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