From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54067C433E1 for ; Wed, 15 Jul 2020 00:03:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3CD922071B for ; Wed, 15 Jul 2020 00:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728006AbgGOADk (ORCPT ); Tue, 14 Jul 2020 20:03:40 -0400 Received: from mga04.intel.com ([192.55.52.120]:24073 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726450AbgGOADj (ORCPT ); Tue, 14 Jul 2020 20:03:39 -0400 IronPort-SDR: Kor1lgqUM0jUOBz+UG6tioKzLUwd4GjAae0IGxK2pLvovYJ3yAUtIOywfCJDPXXl4WJGlLN1Ly ZWJoISx4Vzfw== X-IronPort-AV: E=McAfee;i="6000,8403,9682"; a="146556548" X-IronPort-AV: E=Sophos;i="5.75,353,1589266800"; d="scan'208";a="146556548" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2020 17:03:38 -0700 IronPort-SDR: Go80DYoOa+jgCvzUJ8c8qVgmU4RYBMo5yNdEeYJXx1Q0+44kELwwdx2JGTitw+q18rqebtLFFK S5ELISaY54uQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,353,1589266800"; d="scan'208";a="281912404" Received: from zhangj4-mobl1.ccr.corp.intel.com (HELO [10.249.173.190]) ([10.249.173.190]) by orsmga003.jf.intel.com with ESMTP; 14 Jul 2020 17:03:32 -0700 Subject: Re: [PATCH v2 3/4] x86: Expose SERIALIZE for supported cpuid To: hpa@zytor.com, Sean Christopherson Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, pbonzini@redhat.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, ricardo.neri-calderon@linux.intel.com, kyung.min.park@intel.com, jpoimboe@redhat.com, gregkh@linuxfoundation.org, ak@linux.intel.com, dave.hansen@intel.com, tony.luck@intel.com, ravi.v.shankar@intel.com References: <1594088183-7187-1-git-send-email-cathy.zhang@intel.com> <1594088183-7187-4-git-send-email-cathy.zhang@intel.com> <20200714030047.GA12592@linux.intel.com> <80d91e21-6509-ff70-fb5a-5c042f6ea588@intel.com> <3EFFDE4B-7844-4BB3-A824-487EE8359376@zytor.com> From: "Zhang, Cathy" Message-ID: Date: Wed, 15 Jul 2020 08:03:31 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <3EFFDE4B-7844-4BB3-A824-487EE8359376@zytor.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/15/2020 7:05 AM, hpa@zytor.com wrote: > On July 14, 2020 3:42:08 PM PDT, "Zhang, Cathy" wrote: >> On 7/14/2020 11:00 AM, Sean Christopherson wrote: >>> On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote: >>>> SERIALIZE instruction is supported by intel processors, >>>> like Sapphire Rapids. Expose it in KVM supported cpuid. >>> Providing at least a rough overview of the instruction, e.g. its >> enumeration, >>> usage, fault rules, controls, etc... would be nice. In isolation, >> the >>> changelog isn't remotely helpful in understanding the correctness of >> the >>> patch. >> Thanks Sean! Add it in the next version. >>>> Signed-off-by: Cathy Zhang >>>> --- >>>> arch/x86/kvm/cpuid.c | 3 ++- >>>> 1 file changed, 2 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >>>> index 8a294f9..e603aeb 100644 >>>> --- a/arch/x86/kvm/cpuid.c >>>> +++ b/arch/x86/kvm/cpuid.c >>>> @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void) >>>> kvm_cpu_cap_mask(CPUID_7_EDX, >>>> F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | >>>> F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | >>>> - F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) >>>> + F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | >>>> + F(SERIALIZE) >>>> ); >>>> >>>> /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ >>>> -- >>>> 1.8.3.1 >>>> > At least that one is easy: SERIALIZE is architecturally a NOP, but with hard serialization, like CPUID or IRET. SERIALIZE does not modify registers, arithmetic flags or memory, which is different with CPUID.