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From: Ezequiel Garcia <ezequiel@collabora.com>
To: Zhou Yanjie <zhouyanjie@zoho.com>, linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
	devicetree@vger.kernel.org, ulf.hansson@linaro.org,
	paul.burton@mips.com, linus.walleij@linaro.org,
	paul@crapouillou.net, malat@debian.org, yuehaibing@huawei.com,
	robh+dt@kernel.org, mark.rutland@arm.com, syq@debian.org,
	jiaxun.yang@flygoat.com
Subject: Re: [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name.
Date: Fri, 13 Sep 2019 16:32:52 +0100	[thread overview]
Message-ID: <e9ef3a9093e8572eb3be2aa654dd30069c493a4b.camel@collabora.com> (raw)
In-Reply-To: <1567669089-88693-2-git-send-email-zhouyanjie@zoho.com>

Hi Zhou,

Thanks for your interest in this driver, I'm glad
so see it's more used.

On Thu, 2019-09-05 at 15:38 +0800, Zhou Yanjie wrote:
> Adjust the macro definition name to match the corresponding
> register name in the datasheet.
> 

It's not really an issue to have slighlt different
names on the macros. They are currently sufficiently
descriptive, and I don't think it's deserves a patch.

Thanks,
Ezequiel

> Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
> ---
>  drivers/mmc/host/jz4740_mmc.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
> index ffdbfaa..1b1fcb7 100644
> --- a/drivers/mmc/host/jz4740_mmc.c
> +++ b/drivers/mmc/host/jz4740_mmc.c
> @@ -28,7 +28,7 @@
>  #include <asm/mach-jz4740/dma.h>
>  
>  #define JZ_REG_MMC_STRPCL	0x00
> -#define JZ_REG_MMC_STATUS	0x04
> +#define JZ_REG_MMC_STAT		0x04
>  #define JZ_REG_MMC_CLKRT	0x08
>  #define JZ_REG_MMC_CMDAT	0x0C
>  #define JZ_REG_MMC_RESTO	0x10
> @@ -40,7 +40,7 @@
>  #define JZ_REG_MMC_IREG		0x28
>  #define JZ_REG_MMC_CMD		0x2C
>  #define JZ_REG_MMC_ARG		0x30
> -#define JZ_REG_MMC_RESP_FIFO	0x34
> +#define JZ_REG_MMC_RES		0x34
>  #define JZ_REG_MMC_RXFIFO	0x38
>  #define JZ_REG_MMC_TXFIFO	0x3C
>  #define JZ_REG_MMC_DMAC		0x44
> @@ -391,7 +391,7 @@ static void jz4740_mmc_clock_disable(struct jz4740_mmc_host *host)
>  
>  	writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL);
>  	do {
> -		status = readl(host->base + JZ_REG_MMC_STATUS);
> +		status = readl(host->base + JZ_REG_MMC_STAT);
>  	} while (status & JZ_MMC_STATUS_CLK_EN && --timeout);
>  }
>  
> @@ -403,7 +403,7 @@ static void jz4740_mmc_reset(struct jz4740_mmc_host *host)
>  	writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL);
>  	udelay(10);
>  	do {
> -		status = readl(host->base + JZ_REG_MMC_STATUS);
> +		status = readl(host->base + JZ_REG_MMC_STAT);
>  	} while (status & JZ_MMC_STATUS_IS_RESETTING && --timeout);
>  }
>  
> @@ -446,7 +446,7 @@ static void jz4740_mmc_transfer_check_state(struct jz4740_mmc_host *host,
>  {
>  	int status;
>  
> -	status = readl(host->base + JZ_REG_MMC_STATUS);
> +	status = readl(host->base + JZ_REG_MMC_STAT);
>  	if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK) {
>  		if (status & (JZ_MMC_STATUS_TIMEOUT_WRITE)) {
>  			host->req->cmd->error = -ETIMEDOUT;
> @@ -580,10 +580,10 @@ static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host,
>  	/* For whatever reason there is sometime one word more in the fifo then
>  	 * requested */
>  	timeout = 1000;
> -	status = readl(host->base + JZ_REG_MMC_STATUS);
> +	status = readl(host->base + JZ_REG_MMC_STAT);
>  	while (!(status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) && --timeout) {
>  		d = readl(fifo_addr);
> -		status = readl(host->base + JZ_REG_MMC_STATUS);
> +		status = readl(host->base + JZ_REG_MMC_STAT);
>  	}
>  
>  	return false;
> @@ -614,7 +614,7 @@ static void jz4740_mmc_read_response(struct jz4740_mmc_host *host,
>  {
>  	int i;
>  	uint16_t tmp;
> -	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO;
> +	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RES;
>  
>  	if (cmd->flags & MMC_RSP_136) {
>  		tmp = readw(fifo_addr);
> @@ -797,7 +797,7 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid)
>  	struct mmc_command *cmd = host->cmd;
>  	uint32_t irq_reg, status, tmp;
>  
> -	status = readl(host->base + JZ_REG_MMC_STATUS);
> +	status = readl(host->base + JZ_REG_MMC_STAT);
>  	irq_reg = jz4740_mmc_read_irq_reg(host);
>  
>  	tmp = irq_reg;




  reply	other threads:[~2019-09-13 15:33 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-05  7:38 MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc Zhou Yanjie
2019-09-05  7:38 ` [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name Zhou Yanjie
2019-09-13 15:32   ` Ezequiel Garcia [this message]
2019-09-13 15:59     ` Zhou Yanjie
2019-09-05  7:38 ` [PATCH 2/4] MMC: Ingenic: Add 8bit mode support Zhou Yanjie
2019-09-05  7:38 ` [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings Zhou Yanjie
2019-09-13 14:36   ` Rob Herring
2019-09-05  7:38 ` [PATCH 4/4] MMC: Ingenic: Add support for JZ4760 and support for LPM Zhou Yanjie
2019-10-03 10:00   ` Ulf Hansson
2019-10-06  5:58     ` Zhou Yanjie
2019-10-12  5:13 ` MMC: JZ4740: Add support for 8bit mode and LPM and JZ4760 Soc v2 Zhou Yanjie
2019-10-12  5:13   ` [PATCH 1/6 v2] MMC: Ingenic: Add 8bit mode support Zhou Yanjie
2019-10-12  5:13   ` [PATCH 2/6 v2] dt-bindings: MMC: Add JZ4760 bindings Zhou Yanjie
2019-10-12  5:13   ` [PATCH 3/6 v2] MMC: JZ4740: Add support for the JZ4760 Zhou Yanjie
2019-10-12  5:13   ` [PATCH 4/6 v2] dt-bindings: MMC: Add X1000 bindings Zhou Yanjie
2019-10-14 18:15     ` Rob Herring
2019-10-12  5:13   ` [PATCH 5/6 v2] MMC: JZ4740: Add support for the X1000 Zhou Yanjie
2019-10-12  5:13   ` [PATCH 6/6 v2] MMC: JZ4740: Add support for LPM Zhou Yanjie
2019-10-18  8:52     ` Ulf Hansson
2019-10-18 15:37       ` Paul Cercueil
2019-10-18 16:54       ` Zhou Yanjie
2019-10-19 20:44         ` Ezequiel Garcia
2019-10-21 14:57           ` Ulf Hansson

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