From: Alex Elder <elder@linaro.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: David Miller <davem@davemloft.net>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
syadagir@codeaurora.org, mjavid@codeaurora.org,
evgreen@chromium.org, Ben Chan <benchan@google.com>,
Eric Caruso <ejcaruso@google.com>,
abhishek.esse@gmail.com,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 08/18] soc: qcom: ipa: the generic software interface
Date: Wed, 15 May 2019 08:32:30 -0500 [thread overview]
Message-ID: <fc8ad575-9ad6-27ab-3255-ef0f41f5b1c5@linaro.org> (raw)
In-Reply-To: <CAK8P3a0r5rg-_Vet+aUUzq3S9g=TJHPz9-0yQ0sY21NGd+4J0w@mail.gmail.com>
On 5/15/19 5:47 AM, Arnd Bergmann wrote:
> On Sun, May 12, 2019 at 3:25 AM Alex Elder <elder@linaro.org> wrote:
>
> The per-event interrupt handling seems to be more complex than
> necessary:
I just noticed this message. I'll take another look at this
whole interrupt control mechanism and will try to streamline
it along the lines of what you describe.
Thanks.
-Alex
>
>> +/* Enable or disable an event interrupt */
>> +static void
>> +_gsi_irq_control_event(struct gsi *gsi, u32 evt_ring_id, bool enable)
>> +{
>> + u32 mask = BIT(evt_ring_id);
>> + u32 val;
>> +
>> + if (enable)
>> + gsi->event_enable_bitmap |= mask;
>> + else
>> + gsi->event_enable_bitmap &= ~mask;
>> +
>> + val = gsi->event_enable_bitmap;
>> + iowrite32(val, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
>> +}
>> +
>> +static void gsi_irq_enable_event(struct gsi *gsi, u32 evt_ring_id)
>> +{
>> + _gsi_irq_control_event(gsi, evt_ring_id, true);
>
> You maintain a bitmap here of the enabled-state, and have
> to use a spinlock to ensure that the two are in sync.
>
>> +/* Returns true if the interrupt state (enabled or not) changed */
>> +static bool gsi_channel_intr(struct gsi_channel *channel, bool enable)
>> +{
>> + u32 evt_ring_id = channel->evt_ring_id;
>> + struct gsi *gsi = channel->gsi;
>> + u32 mask = BIT(evt_ring_id);
>> + unsigned long flags;
>> + bool different;
>> + u32 enabled;
>> +
>> + spin_lock_irqsave(&gsi->spinlock, flags);
>> +
>> + enabled = gsi->event_enable_bitmap & mask;
>> + different = enable == !enabled;
>> +
>> + if (different) {
>> + if (enabled)
>> + gsi_irq_disable_event(channel->gsi, evt_ring_id);
>> + else
>> + gsi_irq_enable_event(channel->gsi, evt_ring_id);
>> + }
>> +
>> + spin_unlock_irqrestore(&gsi->spinlock, flags);
>> +
>> + return different;
>> +}
>
> This gets called for each active channel, so you repeatedly
> have to get the spinlock and read the irq-enabled state for it.
>
>> +static void gsi_isr_ieob(struct gsi *gsi)
>> +{
>> + u32 evt_mask;
>> +
>> + evt_mask = ioread32(gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_OFFSET);
>> + evt_mask &= ioread32(gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
>> + iowrite32(evt_mask, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_CLR_OFFSET);
>> +
>> + while (evt_mask) {
>> + u32 evt_ring_id = __ffs(evt_mask);
>> +
>> + evt_mask ^= BIT(evt_ring_id);
>> +
>> + gsi_event_handle(gsi, evt_ring_id);
>> + }
>> +}
>
> However, you start out by clearing all bits here.
>
> Why not skip the clearing and and leave the interrupts enabled,
> while moving the GSI_CNTXT_SRC_IEOB_IRQ_CLR_OFFSET
> write (for a single channel that was completed) to the end of
> gsi_channel_poll()?
>
> Something like
>
> static void gsi_isr_ieob(struct gsi *gsi)
> {
> u32 evt_mask;
>
> evt_mask = ioread32(gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_OFFSET);
> while (evt_mask) {
> u32 evt_ring_id = __ffs(evt_mask);
> evt_mask ^= BIT(evt_ring_id);
>
> napi_schedule(gsi->evt_ring[evt_ring_id].channel.napi);
> }
> }
>
> I also removed the GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET
> read here, as that is probably more expensive than calling napi_schedule()
> for a channel that is already scheduled. Most of the time, I'd expect the
> interrupt to only signal a single channel anyway.
>
> Arnd
>
next prev parent reply other threads:[~2019-05-15 13:32 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-12 1:24 [PATCH 00/18] net: introduce Qualcomm IPA driver Alex Elder
2019-05-12 1:24 ` [PATCH 01/18] bitfield.h: add FIELD_MAX() and field_max() Alex Elder
2019-05-12 6:33 ` Kalle Valo
2019-05-12 12:18 ` Alex Elder
2019-05-12 19:30 ` Johannes Berg
2019-05-12 1:24 ` [PATCH 02/18] soc: qcom: create "include/soc/qcom/rmnet.h" Alex Elder
2019-05-12 2:34 ` Joe Perches
2019-05-12 12:15 ` Alex Elder
2019-05-15 6:59 ` Arnd Bergmann
2019-05-15 12:03 ` Alex Elder
2019-05-16 1:09 ` Subash Abhinov Kasiviswanathan
2019-05-17 17:27 ` Alex Elder
2019-05-17 18:08 ` Subash Abhinov Kasiviswanathan
2019-05-19 17:37 ` Alex Elder
2019-05-12 1:24 ` [PATCH 03/18] dt-bindings: soc: qcom: add IPA bindings Alex Elder
2019-05-15 7:03 ` Arnd Bergmann
2019-05-15 12:04 ` Alex Elder
2019-05-15 16:50 ` Rob Herring
2019-05-15 17:05 ` Alex Elder
2019-05-12 1:24 ` [PATCH 04/18] soc: qcom: ipa: main code Alex Elder
2019-05-12 1:24 ` [PATCH 05/18] soc: qcom: ipa: configuration data Alex Elder
2019-05-12 1:24 ` [PATCH 06/18] soc: qcom: ipa: clocking, interrupts, and memory Alex Elder
2019-05-12 1:24 ` [PATCH 07/18] soc: qcom: ipa: GSI headers Alex Elder
2019-05-12 1:24 ` [PATCH 08/18] soc: qcom: ipa: the generic software interface Alex Elder
2019-05-15 7:21 ` Arnd Bergmann
2019-05-15 12:13 ` Alex Elder
2019-05-15 12:40 ` Arnd Bergmann
2019-05-15 10:47 ` Arnd Bergmann
2019-05-15 13:32 ` Alex Elder [this message]
2019-05-15 19:37 ` Arnd Bergmann
2019-05-12 1:24 ` [PATCH 09/18] soc: qcom: ipa: GSI transactions Alex Elder
2019-05-15 7:34 ` Arnd Bergmann
2019-05-15 12:25 ` Alex Elder
2019-05-15 20:50 ` Arnd Bergmann
2019-05-17 18:08 ` Alex Elder
2019-05-17 18:33 ` Arnd Bergmann
2019-05-17 18:44 ` Alex Elder
2019-05-19 17:11 ` Alex Elder
2019-05-20 9:25 ` Arnd Bergmann
2019-05-20 12:50 ` Alex Elder
2019-05-20 14:43 ` Arnd Bergmann
2019-05-20 14:44 ` Alex Elder
2019-05-20 16:34 ` Evan Green
2019-05-20 16:50 ` Alex Elder
2019-05-20 17:36 ` Evan Green
2019-05-12 1:25 ` [PATCH 10/18] soc: qcom: ipa: IPA interface to GSI Alex Elder
2019-05-12 1:25 ` [PATCH 11/18] soc: qcom: ipa: IPA endpoints Alex Elder
2019-05-12 1:25 ` [PATCH 12/18] soc: qcom: ipa: immediate commands Alex Elder
2019-05-15 8:16 ` Arnd Bergmann
2019-05-15 12:35 ` Alex Elder
2019-05-18 0:34 ` Alex Elder
2019-05-20 14:50 ` Arnd Bergmann
2019-05-20 14:55 ` Alex Elder
2019-05-20 17:35 ` Christoph Hellwig
2019-05-12 1:25 ` [PATCH 13/18] soc: qcom: ipa: IPA network device and microcontroller Alex Elder
2019-05-15 8:21 ` Arnd Bergmann
2019-05-15 12:46 ` Alex Elder
2019-05-12 1:25 ` [PATCH 14/18] soc: qcom: ipa: AP/modem communications Alex Elder
2019-05-12 1:25 ` [PATCH 15/18] soc: qcom: ipa: support build of IPA code Alex Elder
2019-05-12 1:25 ` [PATCH 16/18] MAINTAINERS: add entry for the Qualcomm IPA driver Alex Elder
2019-05-12 1:25 ` [PATCH 17/18] arm64: dts: sdm845: add IPA information Alex Elder
2019-05-12 1:25 ` [PATCH 18/18] arm64: defconfig: enable build of IPA code Alex Elder
2019-05-15 8:23 ` Arnd Bergmann
2019-05-15 12:49 ` Alex Elder
2019-05-15 12:37 ` [PATCH 00/18] net: introduce Qualcomm IPA driver Arnd Bergmann
2019-05-15 12:52 ` Alex Elder
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