From: Palmer Dabbelt <palmer@dabbelt.com>
To: Anup Patel <Anup.Patel@wdc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
aou@eecs.berkeley.edu, daniel.lezcano@linaro.org,
tglx@linutronix.de, jason@lakedaemon.net,
Marc Zyngier <maz@kernel.org>, Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
anup@brainfault.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, Anup Patel <Anup.Patel@wdc.com>
Subject: Re: [PATCH v5 2/6] RISC-V: Rename and move plic_find_hart_id() to arch directory
Date: Thu, 28 May 2020 18:37:19 -0700 (PDT) [thread overview]
Message-ID: <mhng-6df8942f-32e6-4334-82c4-1721e571ab1b@palmerdabbelt-glaptop1> (raw)
In-Reply-To: <20200521133301.816665-3-anup.patel@wdc.com>
On Thu, 21 May 2020 06:32:57 PDT (-0700), Anup Patel wrote:
> The plic_find_hart_id() can be useful to other interrupt controller
> drivers (such as RISC-V local interrupt driver) so we rename this
> function to riscv_of_parent_hartid() and place it in arch directory
> along with riscv_of_processor_hartid().
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> ---
> arch/riscv/include/asm/processor.h | 1 +
> arch/riscv/kernel/cpu.c | 16 ++++++++++++++++
> drivers/irqchip/irq-sifive-plic.c | 16 +---------------
> 3 files changed, 18 insertions(+), 15 deletions(-)
>
> diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
> index 3ddb798264f1..b1efd840003c 100644
> --- a/arch/riscv/include/asm/processor.h
> +++ b/arch/riscv/include/asm/processor.h
> @@ -75,6 +75,7 @@ static inline void wait_for_interrupt(void)
>
> struct device_node;
> int riscv_of_processor_hartid(struct device_node *node);
> +int riscv_of_parent_hartid(struct device_node *node);
>
> extern void riscv_fill_hwcap(void);
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 40a3c442ac5f..6d59e6906fdd 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -44,6 +44,22 @@ int riscv_of_processor_hartid(struct device_node *node)
> return hart;
> }
>
> +/*
> + * Find hart ID of the CPU DT node under which given DT node falls.
> + *
> + * To achieve this, we walk up the DT tree until we find an active
> + * RISC-V core (HART) node and extract the cpuid from it.
> + */
> +int riscv_of_parent_hartid(struct device_node *node)
> +{
> + for (; node; node = node->parent) {
> + if (of_device_is_compatible(node, "riscv"))
> + return riscv_of_processor_hartid(node);
> + }
> +
> + return -1;
> +}
> +
> #ifdef CONFIG_PROC_FS
>
> static void print_isa(struct seq_file *f, const char *isa)
> diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> index d9c53f85a68e..16d31d114c30 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -240,20 +240,6 @@ static void plic_handle_irq(struct pt_regs *regs)
> csr_set(CSR_IE, IE_EIE);
> }
>
> -/*
> - * Walk up the DT tree until we find an active RISC-V core (HART) node and
> - * extract the cpuid from it.
> - */
> -static int plic_find_hart_id(struct device_node *node)
> -{
> - for (; node; node = node->parent) {
> - if (of_device_is_compatible(node, "riscv"))
> - return riscv_of_processor_hartid(node);
> - }
> -
> - return -1;
> -}
> -
> static void plic_set_threshold(struct plic_handler *handler, u32 threshold)
> {
> /* priority must be > threshold to trigger an interrupt */
> @@ -330,7 +316,7 @@ static int __init plic_init(struct device_node *node,
> if (parent.args[0] != RV_IRQ_EXT)
> continue;
>
> - hartid = plic_find_hart_id(parent.np);
> + hartid = riscv_of_parent_hartid(parent.np);
> if (hartid < 0) {
> pr_warn("failed to parse hart ID for context %d.\n", i);
> continue;
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
next prev parent reply other threads:[~2020-05-29 1:37 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 13:32 [PATCH v5 0/6] New RISC-V Local Interrupt Controller Driver Anup Patel
2020-05-21 13:32 ` [PATCH v5 1/6] RISC-V: self-contained IPI handling routine Anup Patel
2020-05-28 23:08 ` Atish Patra
2020-05-29 1:37 ` Palmer Dabbelt
2020-05-21 13:32 ` [PATCH v5 2/6] RISC-V: Rename and move plic_find_hart_id() to arch directory Anup Patel
2020-05-28 23:09 ` Atish Patra
2020-05-29 1:37 ` Palmer Dabbelt [this message]
2020-05-21 13:32 ` [PATCH v5 3/6] irqchip: RISC-V per-HART local interrupt controller driver Anup Patel
2020-05-29 2:40 ` Palmer Dabbelt
2020-05-29 4:15 ` Anup Patel
2020-05-29 10:09 ` Marc Zyngier
2020-05-29 10:45 ` Anup Patel
2020-05-29 11:10 ` Marc Zyngier
2020-05-29 11:45 ` Anup Patel
2020-05-21 13:32 ` [PATCH v5 4/6] clocksource/drivers/timer-riscv: Use per-CPU timer interrupt Anup Patel
2020-05-22 13:08 ` Daniel Lezcano
2020-05-23 5:15 ` Anup Patel
2020-05-29 5:04 ` Atish Patra
2020-05-21 13:33 ` [PATCH v5 5/6] RISC-V: Remove do_IRQ() function Anup Patel
2020-05-29 0:32 ` Atish Patra
2020-05-21 13:33 ` [PATCH v5 6/6] RISC-V: Force select RISCV_INTC for CONFIG_RISCV Anup Patel
2020-05-29 0:33 ` Atish Patra
2020-05-27 18:47 ` [PATCH v5 0/6] New RISC-V Local Interrupt Controller Driver Palmer Dabbelt
2020-05-29 3:57 ` Anup Patel
2020-05-29 4:13 ` Palmer Dabbelt
2020-05-29 4:24 ` Anup Patel
2020-05-29 10:13 ` Marc Zyngier
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